Texas Instruments TMS320C6670, Data Manual

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74 Device Configuration Copyright 2012 Texas Instruments Incorporated
SPRS689D—March 2012
Multicore Fixed and Floating-Point System-on-Chip
TMS320C6670
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3.3.6 LRESETNMI PIN Status Clear (LRSTNMIPINSTAT_CLR) Register
The LRSTNMIPINSTAT_CLR Register is used to clear the status of LRESET and NMI based on CORESEL[2:0]. The
LRESETNMI PIN Status Clear Register is shown in
Figure 3-5 and described in Table 3-7 .
Table 3-6 LRESETNMI PIN Status Register Field Descriptions
Bit Field Description
31-20 Reserved Reserved
19 NMI3 CorePac3 in NMI
18 NMI2 CorePac2 in NMI
17 NMI1 CorePac1 in NMI
16 NMI0 CorePac0 in NMI
15-4 Reserved Reserved
3 LR4 CorePac3 in Local Reset
2 LR3 CorePac2 in Local Reset
1 LR31 CorePac1 in Local Reset
0 LR0 CorePac0 in Local Reset
End of Table 3-6
Figure 3-5 LRESETNMI PIN Status Clear Register (LRSTNMIPINSTAT_CLR)
31 20 19 18 17 16 15 4 3 2 1 0
Reserved NMI3 NMI2 NMI1 NMI0 Reserved LR3 LR2 LR1 LR0
R,+000000000000 WC,+0 WC,+0 WC,+0 WC,+0 R,+000000000000 WC,+0 WC,+0 WC,+0 WC,+0
Legend: R = Read only; - n = value after reset; WC = Write 1 to Clear
Table 3-7 LRESETNMI PIN Status Clear Register Field Descriptions
Bit Field Description
31-20 Reserved Reserved
19 NMI3 CorePac3 in NMI Clear
18 NMI2 CorePac2 in NMI Clear
17 NMI1 CorePac1 in NMI Clear
16 NMI0 CorePac0 in NMI Clear
15-4 Reserved Reserved
3 LR3 CorePac3 in Local Reset Clear
2 LR2 CorePac2 in Local Reset Clear
1 LR1 CorePac1 in Local Reset Clear
0 LR0 CorePac0 in Local Reset Clear
End of Table 3-7