Texas Instruments TMS320C3 Series, User Manual, Page: 36 / 166

DSK Hardware Interface
4-2
4.1 DSK Hardware Interface
The ’C3x DSK starts up by responding to a host reset command and bootload-
ing a communications kernel or a program that you supply. The communica-
tions kernel provides the necessary I/O for interfacing the DSK board and the
host system. Host communications occur through the parallel bus of the ’C31,
while analog I/O is handled by the TLC32040 analog interface circuit (AIC) and
sent to the ’C31’s serial port.
See Appendix A,
Communications Kernel Source Code, for more information.
Host hardware interface
The host interface connects the ’C31 parallel bus to the host PC parallel printer
port. It consists of three devices:
-
A programmable array logic (TICPAL22V10Z)
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Two high-speed octal bus transceivers with tri-state outputs (74ACT245)
The programmable array logic (PAL) determines when the ’C31 is accessing
the host interface by using the STROBE A23, A22, A21, and A20 signals to
decode the address of the ’C31.
The PAL provides one input (TRI) that disconnects the host interface by tri-
stating the PAL INT2 and READY signals. The PAL provides five address de-
code outputs: USER_IOR, USER_IOW, USER_IO, USER_RAM,
USER_BOOT; and three outputs: READY, INT2, and EN signals. When the
DEMO signal is pulled high, two of the address decode outputs, USER_IO and
USER_BOOT, drive the tri-color LED.
The bus transceivers buffer data between the PC parallel printer port and the
’C31 parallel bus. The host interface supports two types of transfers:
-
The 8-bit bidirectional mode allows faster transfers on parallel printer ports
that support bidirectional transfers.
-
Unidirectional printer ports support an 8-bit transfer from the host to the
’C31 while supporting 4-bit transfers from the ’C31 to the host.
Figure 4–1 shows a high-level circuit diagram of the ’C3x DSK.