Texas Instruments TMS320C3 Series, User Manual, Page: 131 / 166

Communications Kernel Source Code
A-3 Communications Kernel Source Code
;========================================================================;
; DEBUGGER COMMANDS ;
; The debugger commands are assembled into the lowest available kernel ;
; memory. If an application were to overgow this section the debugger ;
; functions would be corrupted, but the application would continue to ;
; run so long as the debugger functions were not used. ;
;========================================================================;
; XSTEP/XRUNF ;
; ;
; These functions restore the CPU registers from the context save area ;
; before returning to the code pointed to by the program counter value. ;
; The only difference is that XSTEP purposely sets the interrupt flag ;
; used for single stepping before returning to the users code. ;
; ;
; SINGLE STEPPING ;
; The tail end of this function is written such that a pending ;
; interrupt will not be serviced until one opcode has been fetched from ;
; the return address and executed (there may be other dummy fetches). ;
; This ’pending’ interrupt then causes the processor to return back to ;
; the context save routine, effectively singlestepping the CPU. ;
; ;
;========================================================================;
S0_xdata .set 0x808048 ; SP 0 Data transmit
S0_rdata .set 0x80804C ; SP 0 Data receive
.sect ”kernel”
.word 0x00320C31 ; Prepend a few easily recognizable markers
.word 0x00320C31 ;
XSTEP or 0x40,IF ; set XINT1 (safe INT for C31/C32 debug!)
XRUNF or 0xC4,IE ; set EXINT1 (safe INT for C31/C32 debug!)
;–––––––––––––––––––––––
sti IE,@_freerun ; Freerun !=0 indicates DSK is not halted
;–––––––––––––––––––––––
ldi @CPUCTXT,AR0 ; Use parallel opcodes for squeeze
ldi AR0,AR1 ;
addi 1,AR1 ;
ldi 2,IR0 ;
;–––––––––––––––––––––––
ldi @S0_rdata,R0 ; Clear under/overrun conditions before exit
ldi 0,R0 ; 0 ensures low bits during SP recovery
sti R0,@S0_xdata ; XSR resends – should all be zero
ldf *AR0++(IR0),R0 ; load floats (exponents)
|| ldf *AR1++(IR0),R1 ;
ldf *AR0++(IR0),R2 ;
|| ldf *AR1++(IR0),R3 ;
ldf *AR0++(IR0),R4 ;
|| ldf *AR1++(IR0),R5 ;
ldf *AR0++(IR0),R6 ;
|| ldf *AR1++(IR0),R7 ;
;– – – – – – – – – – – –
ldi *AR0++(IR0),R0 ; load longs (mantissa)
|| ldi *AR1++(IR0),R1 ;
ldi *AR0++(IR0),R2 ;
|| ldi *AR1++(IR0),R3 ;
ldi *AR0++(IR0),R4 ;
|| ldi *AR1++(IR0),R5 ;