Texas Instruments eInfochips TMDXEVM6657L, Technical Reference Manual, Page: 86 / 91

Technical Reference Manual TMDXEVM6657L
SPRUHG7 - Revised August 2012
TMDXEVM6657LE
Page 86 / 90
Register Address:
SPI Base + 0Fh
Register Name: Scratch Register
Default Value:
00h
Attribute:
Read/Write
Bit Description Read/Write
7-0 Scratch Data R/W
Register Address: SPI Base + 10h
Register Name: CLK-GEN 2 Control Register
Default Value:
00h
Attribute:
Read/Write
Bit Description Read/Write
0
Initiate a data transfer via the SPI bus to update the SPI command to
CDCE62005 Clock Generator#2
0: Idle state
1: Write 1 to perform the SPI command update process.
R/W
1
BUSY status indication for the CDCE62005 Clock Generator#2 SPI bus
0: The SPI bus for the CDCE62005 Clock Generator #2 is idle.
1: The SPI bus for the CDCE62005 Clock Generator #2 is busy and a
SPI command is processing.
RO
7-2 Reserved RO
Register Address: SPI Base + 11h
Register Name: CLK-GEN 2 Interface Setting Register
Default Value:
03h
Attribute:
Read/Write
Bit Description Read/Write
7-0
This register is a clock divider setting to adjust the interface clock for the
CDCE62005 Clock Generator #2 SPI bus.
00 : CDCE62005 2 SPI Clock = 12MHz ( = 48 / 4 )
01 : CDCE62005 2 SPI Clock = 12MHz ( = 48 / 4 )
02 : CDCE62005 2 SPI Clock = 8 MHz ( = 48 / 6 )
03 : CDCE62005 2 SPI Clock = 6 MHz ( = 48 / 8 )
04 : CDCE62005 2 SPI Clock = 4.8 MHz ( = 48 /10 )
05 : CDCE62005 2 SPI Clock = 4 MHz ( = 48 /12 )
06 : CDCE62005 2 SPI Clock = 3.42 MHz ( = 48 / 14)
……
X : CDCE62005 2 SPI Clock = 48 MHz /((X+1)*2) if X != 0
R/W
Register Address: SPI Base + 12~13h
Register Name: Reserved
Default Value:
00h
Attribute:
Read/Write