Texas Instruments eInfochips TMDXEVM6657L, Technical Reference Manual, Page: 17 / 91

Technical Reference Manual TMDXEVM6657L
SPRUHG7 - Revised August 2012
TMDXEVM6657LE
Page 17 / 90
2. Introduction to the C6657 Lite EVM board
This chapter provides an introduction and details of interfaces for the C6657 Lite EVM board. It contains:
2.1
Memory Map
2.2
EVM Boot mode and Boot configuration switch settings
2.3
Board Revision ID
2.4
JTAG - Emulation Overview
2.5
Clock Domains
2.6
I2C boot EEPROM / SPI NOR Flash
2.7
FPGA
2.8
Gigabit Ethernet PHY
2.9
Serial RapidIO(SRIO) Interface
2.10
DDR3 External Memory Interface
2.11
16-bit Asynchronous External Memory Interface or UPP
2.12
HyperLink Interface
2.13
PCIe Interface
2.14
UART Interface
2.15
Module Management Controller for IPMI
2.16
Additional Headers
2.1 Memory Map
The memory map of the TMS320C6657 device is as shown in Table 2.1. The external memory configuration
register address ranges in the C6657 device begin at the hex address location 0x7000 0000 for EMIFA and hex
address location 0x7800 0000 for DDR3 Memory Controller.