71M6403
Electronic Trip Unit
SEPTEMBER 2006
Page: 74 of 75
©
2006 TERIDIAN Semiconductor Corporation
REV 1.0
Digital Pins:
NAME PIN
#
TYPE
DESCRIPTION
DIO_3,
DIO_2,
DIO_1,
DIO_0
21
20
19
18
I/O
Digital input/output pins 0 through 3
COM3,
COM2,
COM1,
COM0
25
24
23
22
O
LCD Common Outputs: These 4 pins provide the select signals for the LCD display.
SEG0…SEG2,
SEG8…SEG23
See
pinout
O
Dedicated LCD segment outputs
SEG24/DIO4…
…….
SEG41/DIO21
See
pinout
I/O
Multi-use pins, configurable as either LCD SEG driver or DIO. (DIO4 = SCK, DIO5 =
SDA when configured as EEPROM interface, STROBE = DIO6, FAULT_PULSE =
DIO7 when configured as pulse outputs)
SEG7/MUX_SYNC 37 O
Multi-use-pin LCD Segment Output/ MUX_SYNC is output for Synchronous serial
interface
SEG6/SRDY 35
I/O
Multi-use-pin,
LCD
Segment Outputs/ SRDY input for Synchronous serial interface.
SEG5/SFR
11
O
Multi-use-pin, LCD Segment Output/ SFR output for SSI.
SEG4/SDATA
10
O
Multi-use-pin, LCD Segment Output/ SDATA output for SSI.
SEG3/SCLK
6
O
Multi-use-pin, LCD Segment Output/ SCLK output for SSI.
RESETZ 74
I
Chip reset: This pin is used to reset the chip into a known state. For normal
operation, this pin is set to 1. To reset the chip, this pin is driven to 0. This pin has
an internal 30
µ
A (nominal) current source pull-up but no Schmitt-trigger input
circuitry. The minimum width of the pulse is 5
µ
s. A 0.1µF capacitor to GNDA should
be connected to this pin.
RX
71
I
UART input. The voltage applied at this input must be below 3.6V.
TX 5
O
UART
output.
OPT_RX 89
I
Optical Receive Input: This pin receives a signal from an external photo-detector
used in an IR serial interface.
OPT_TX 3
O
Optical LED Transmit Output: This pin is designed to directly drive an LED for
transmitting data in an IR serial interface. Can be tristated with
OPT_TXDIS
to be
multiplexed with other DIO pins.
CK
8
O
Clock input (19.6608 MHz)
TMUXOUT
4
O
Digital output test multiplexer. Controlled by
DMUX[3:0].
E_RXTX
2
I/O
Emulator serial data.
E_TBUS[3]
E_TBUS[2]
E_TBUS[1]
E_TBUS[0]
12
13
14
15
O
Emulator trace bus. These pins have internal pull-up resistors.
E_ISYNC/BRKRQ
29
I/O
Emulator handshake. This pin has an internal pull-up resistor.
E_TCLK
100
O
Emulator clock. This pin has an internal pull-up resistor.
E_RST
97
I
Emulator reset. This pin has an internal pull-up resistor.
TEST3 93
I
For TERIDIAN internal use. This pin must be connected to GNDD via a 1k
Ω
resistor.
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