71M6403
Electronic Trip Unit
SEPTEMBER 2006
Page: 55 of 75
©
2006 TERIDIAN Semiconductor Corporation
REV 1.0
LCD_NUM[4:0]
2020[4:0] R/W
Number
of dual-purpose LCD/DIO pins to be configured as LCD. This
number can be between 0 and 18. The first dual-purpose pin to be
used as LCD is SEG41/DIO21. If
LCD_NUM
= 2, SEG41 and SEG 40
will be configured as LCD. The remaining SEG39 to SEG24 will be
configured as DIO19 to DIO4.
LCD_NUM
SEG
DIO
0 None
DIO4-21
1 SEG41
DIO4-20
2 SEG40-41
DIO4-19
3 SEG39-41
DIO4-18
4 SEG38-41
DIO4-17
5 SEG37-41
DIO4-16
6 SEG36-41
DIO4-15
7 SEG35-41
DIO4-14
8 SEG34-41
DIO4-13
9 SEG33-41
DIO4-12
10 SEG32-41
DIO4-11
11 SEG31-41
DIO4-10
12 SEG30-41
DIO4-9
13 SEG29-41
DIO4-8
14 SEG28-41
DIO4-7
15 SEG27-41
DIO4-6
16 SEG26-41
DIO4-5
17 SEG25-41
DIO4
18
SEG24-41
None
LCD_SEG0[3:0]
…
LCD_SEG41[3:0]
2030[3:0]
…
2059[3:0]
R/W LCD Segment Data. Each word contains information for from 1 to 4
time divisions of each segment. In each word, bit 0 corresponds to
COM0, on up to bit 3 for COM3.
MPU_DIV[2:0]
2004[2:0]
R/W The MPU clock divider (from CKCE). These bits may be programmed
by the MPU without risk of losing control.
000 - CKCE, 001 - CKCE/2, …, 111 - CKCE/2
7
MPU_DIV is 000 on power-up.
MUX_ALT
2005[2]
R/W The MPU asserts this bit when it wishes the MUX to perform ADC
conversions on an alternate set of inputs.
MUX_DIV[1:0]
2002[7:6] R/W
The
number
of states in the input multiplexer.
00 - 6 states (I0-I5)
01 - 4 states (I0-I3)
10 - 3 states (I0-I2)
11 - 2 states (I0-I1)
MUX_E
2005[0]
R/W MUX_SYNC enable. When high, converts SEG7 into a MUX_SYNC
output.
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