Tektronix WFM601, Service Manual

Page: 79 / 304

Theory of Operation
3–22
WFM 601 - Service Manual
are identical, one is driven by the internal video that drives the vertical deflection
circuits and the other is driven by the selected reference input.
The Line Rate Controller (U34) is a programmable logic device. It is capable of
logic and timing simulations. It has three separate clock signals: 6 MHz from
U93, 16 MHz from the Microprocessor, and a 5 MHz clock signal from an ECL
oscillator. In order to lock the internal clock to video, U34 asserts START at the
leading edge of H sync. When START goes low, it remains low for approxi-
mately 60
m
s; it then goes high to shut off the oscillator (Q4, Q5, Q6, and U26C)
until the next cycle.
U34 has 144 configurable blocks of RAM that are loaded from ROM at power
up. U40 is a first-in/first-out RAM that is loaded from the Microprocessor, and
read out to the Line Rate Controller and synchronous latches on command from
the Line Rate Controller. U40 can be written to by the Microprocessor and read
from by the Line Rate Controller independently.
Output signals from the Microprocessor are timed out to analog switches and
DACs by the Line Rate Controller clocks synchronous latches (U42, U43, U44,
U51, and U52). Each latch is clocked by its own individual output from the Line
Rate Controller.
Diagram 16 Readout
The Readout Control state machine interprets the readout instructions from the
Microprocessor and loads digital data into the DAC. Analog output of the DAC
drives the stroke generators to create the readout segments that are displayed on
the crt.
The Readout Control is a programmable logic device, U27, configured as a state
machine. It uses 13 buffered addresses and 8 buffered data bits to produce an
8-bit data word (R0 – R7) that is converted by an 8-bit DAC (U37). Device
clock is the buffered 16 MHz from the Microprocessor. When Readout Control
is off U36, a RAM, can be written to directly by the Microprocessor, through its
13-bit address port. A screen draw requires 13 bits.
U37 is a dual DAC that decodes the Microprocessor instructions. The A output
drives the Vertical Readout Stroke Generator and the B half performs the same
function for the Horizontal Readout Stroke Generator. Calibration constants are
provided by the serial digital to analog DACs shown on Diagram 17.
The Readout Stroke Generator consists of two identical circuits. Each generator
has an inverting buffer amplifier, U48A or U48B, whose gain is unity. The
output of the buffer amplifier drives a sample-and-hold, U54A or U54C. Timing
Line Rate Controller
Synchronous Outputs
Readout Control
Readout Stroke Generator