Tektronix WFM601, Service Manual

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Theory of Operation
WFM 601 - Service Manual
3–5
GBR signals from the Color Difference to GBR Transcoder are input to the GBR
to Diamond Transcoder to be matrixed and applied to the Component Mode
switching. The outputs from the Transcoder are 0.5 times G+B or R or B–G.
These outputs drive the vertical and horizontal axes for the diamond display.
Mode switching provides the inputs to the axes for Lightning, Diamond,
Component Vector, and Bowtie displays.
The Vertical Output Amplifier is a backporch clamped differential amplifier with
unity gain. Its output is low-pass filtered (1.5 MHz) for all display modes except
Bowtie, which bypasses the filter. The Horizontal Output Amplifier is a
backporch clamped buffer whose output is low-pass filtered (1.5 MHz). The
outputs of both the amplifiers are input into the Output Amplifier Switching.
Block Diagram 3
Microprocessor and Line Rate Controller
The heart of these instruments is a microprocessor. It controls all aspects of the
instruments operation. Where synchronous control signals are required a Line
Rate Controller is employed.
The 16-bit Microprocessor has its program code stored in a Flash Erasable
Programmable Read-Only Memory (EPROM). The Non-Volatile Random
Access Memory (NOVRAM) stores all of the constants used by the Micropro-
cessor. The Random Access Memory (RAM) is used to move system level code
for execution by the Microprocessor. The Read-Only Memory (ROM) contains
Microprocessor code that is output on the 8 most significant bits to the data bus.
The Address Buffer is unidirectional to select the addresses in the storage
devices (RAM, ROM, and EPROM) while the Data Buffer is bidirectional for
two-way communication with the storage devices.
The Line Rate Controller is loaded from the Microprocessor, synchronized to the
incoming video reference, and outputs the synchronous switching signals that are
required to make the displays viewed on the CRT.
Two sync separators are used to time the line Rate Controller. One strips sync
from the internal video signal, while the second strips sync from the external
reference video. Two separators are required to support color field identification
(SCH).
Data from the Microprocessor is loaded into latches that are clocked by the Line
Rate Controller to lock their outputs to the incoming video signal.
GBR to Diamond
Transcoder and Mode
Switching
Horizontal and Vertical
Component Outputs
Microprocessor
Line Rate Controller
Sync Separators
Synchronous Outputs