Theory
of
Operation—
DM 5010
2994-15
Fig. 4-7. Charge-balancing converter configuration during the auto-zero period.
change
charge direction and rate. This is done by
switching
1^
into the summing
node. The Integrator output now
charges
negatively toward the zero-reference voltage for a
complete number
of 18-count measurement intervals (ex
cept for
each TO as explained above). An up/down counter
in the Data stage keeps track of the net time required by the
ret
t0
ba(ar
>c® the effect of l/n on the integrator capacitor
by adding or subtracting
a net count of 16 counts for each
measure interval to a running total, dependent on the Com
parators
output state.
After
the Measurement Period
is
completed, an “over
ride
” period is entered, in which the integrator is allowed to
charge back
to the zero-referenced
voltage while accumu
lating
counts in the Data counter. During this period the
DCV
Signal Conditioner
input is connected to
the high qual
ity ground by Q1317. The
l^ ref balances the remaining
charge
on the
integrator capacitor due to l(r).
ADD
JAN
1982
4-11
Summary of Contents for DM 5010
Page 14: ...DM 5010 2994 00 DM 5010 Programmable Digital Multimeter xii ADD JUL 1986...
Page 27: ...Operating Instructions DM 5010 2994 03 Fig 2 3 DM 5010 front panel controls and connectors 2 3...
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Page 251: ...Section 8 DM 5010 OPTIONS No options are available 8 1...
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Page 272: ...DM 5010 2994 37 Fig 10 2 Location of DM 5010 adjustments and test points...
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Page 276: ...DM 5010 2994 112 DM 5010 BLOCK DIAGRAM...
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Page 337: ...63 REV JUN 1986...
Page 338: ...FIG 1 EXPLODED DM 5010...
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