Sun Microsystems Ultra 5, Service Manual

Page: 57 / 258

Chapter 3 Power-On Self-Test 3-9
Probing keyboard Done
%o0 = 0000.0000.0000.4001
Executing Power On SelfTest
@(#) Sun Ultra 5/10 (Darwin) POST 2.1.1 (Build No. 293) 08/21/97:
15:59
CPU: UltraSPARC-LC (MHz: 301 Ecache Size: 512KB)
Init POST BSS
Init System BSS
NVRAM
NVRAM Battery Detect Test
NVRAM Scratch Addr Test
NVRAM Scratch Data Test
DMMU TLB Tags
DMMU TLB Tag Access Test
DMMU TLB RAM
DMMU TLB RAM Access Test
Probe Ecache
Probe Ecache
Ecache Tests
Ecache RAM Addr Test
Ecache Tag Addr Test
Ecache RAM Test
Ecache Tag Test
All CPU Basic Tests
V9 Instruction Test
CPU Tick and Tick Compare Reg Test
CPU Soft Trap Test
CPU Softint Reg and Int Test
All Basic MMU Tests
DMMU Primary Context Reg Test
DMMU Secondary Context Reg Test
DMMU TSB Reg Test
DMMU Tag Access Reg Test
DMMU VA Watchpoint Reg Test
DMMU PA Watchpoint Reg Test
IMMU TSB Reg Test
IMMU Tag Access Reg Test
All Basic Cache Tests
Dcache RAM Test
Dcache Tag Test
Icache RAM Test
CODE EXAMPLE 3-1 diag-level
Variable Set to
max
(Continued)
Power On Selftest Completed