CPU & Memory Configuration
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19
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CPU and Memory Configuration (cont)
Below is a layout of a system board. Descriptions of physical and logical
banks follow:
6800b-sc0:SC> showcomponent /N0/SB2
Component Status Pending POST Description
--------- ------ ------- ---- -----------
/N0/SB2/P0 enabled - pass UltraSPARC-III+, 900MHz, 8M ECache
/N0/SB2/P1 enabled - pass UltraSPARC-III+, 900MHz, 8M ECache
/N0/SB2/P2 enabled - pass UltraSPARC-III+, 900MHz, 8M ECache
/N0/SB2/P3 enabled - pass UltraSPARC-III+, 900MHz, 8M ECache
/N0/SB2/P0/B0/L0 enabled - pass 2048M DRAM
/N0/SB2/P0/B0/L2 enabled - pass 2048M DRAM
/N0/SB2/P0/B1/L1 enabled - pass 2048M DRAM
/N0/SB2/P0/B1/L3 enabled - pass 2048M DRAM
/N0/SB2/P1/B0/L0 enabled - pass 2048M DRAM
/N0/SB2/P1/B0/L2 enabled - pass 2048M DRAM
/N0/SB2/P1/B1/L1 enabled - pass 2048M DRAM
/N0/SB2/P1/B1/L3 enabled - pass 2048M DRAM
/N0/SB2/P2/B0/L0 enabled - pass 2048M DRAM
/N0/SB2/P2/B0/L2 enabled - pass 2048M DRAM
/N0/SB2/P2/B1/L1 enabled - pass 2048M DRAM
/N0/SB2/P2/B1/L3 enabled - pass 2048M DRAM
/N0/SB2/P3/B0/L0 enabled - pass 2048M DRAM
/N0/SB2/P3/B0/L2 enabled - pass 2048M DRAM
/N0/SB2/P3/B1/L1 enabled - pass 2048M DRAM
/N0/SB2/P3/B1/L3 enabled - pass 2048M DRAM
6800b-sc0:SC>
Each cpu has 2 physical banks (Even & Odd) with 4 DIMMS each
B0: Group 0 is the Even bank (Note the Even bank DIMMS end with a "0")
B1: Group 1 is the Odd bank (Note the Odd bank DIMMS end with a "1")
Each physical bank has 2 logical banks
L0 is the front of all 4 DIMMS of the physical bank B0
L2 is the back of all 4 DIMMS of the physical bank B0
L1 is the front of all 4 DIMMS of the physical bank B1
L3 is the back of all 4 DIMMS of the physical bank B1