Starting the domain - Example
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{/N0/SB4/P0} Subtest: CPU Stick and Stick Compare Registers Test
{/N0/SB4/P1} Subtest: CPU Stick and Stick Compare Registers Test
{/N0/SB4/P0} Subtest: FPU Move to Registers Test
{/N0/SB4/P1} Subtest: FPU Move to Registers Test
{/N0/SB4/P0} Subtest: FPU Branch Test
{/N0/SB4/P1} Subtest: FPU Branch Test
{/N0/SB4/P0} Subtest: Branch Memory Test
{/N0/SB4/P1} Subtest: Branch Memory Test
{/N0/SB4/P0} Subtest: CPU Stress
{/N0/SB4/P1} Subtest: CPU Stress
{/N0/SB4/P0} Using PA range at 00000080.00000000
{/N0/SB4/P1} Using PA range at 00000084.02000000
{/N0/SB4/P0} Using PA range at 00000080.00000000
{/N0/SB4/P1} Using PA range at 00000084.02000000
{/N0/SB4/P0} Running CPU ECC Tests
{/N0/SB4/P1} Running CPU ECC Tests
{/N0/SB4/P0} Subtest: Fast ECC errors test
{/N0/SB4/P1} Subtest: Fast ECC errors test
{/N0/SB4/P0} Subtest: MTAG ECC errors test
{/N0/SB4/P1} Subtest: MTAG ECC errors test
{/N0/SB4/P0} Subtest: SYSTEM ECC errors test
{/N0/SB4/P1} Subtest: SYSTEM ECC errors test
{/N0/SB4/P0} Subtest: Ecache Tag ECC errors test
{/N0/SB4/P1} Subtest: Ecache Tag ECC errors test
{/N0/SB4/P0} Running System Level Tests
{/N0/SB4/P1} Running System Level Tests
{/N0/SB4/P0} Subtest: MP Memory Access Test
{/N0/SB4/P1} Subtest: MP Memory Access Test
{/N0/SB4/P0} Running Board Memory Interleave
{/N0/SB4/P1} Running Board Memory Interleave
{/N0/SB4/P0} Subtest: Board Memory Interleave Configuration
{/N0/SB4/P1} Subtest: Board Memory Interleave Configuration
{/N0/SB4/P0} Passed
{/N0/SB4/P1} Passed
{/N0/SB4/P2} Disabled
{/N0/SB4/P3} Disabled
Testing IO Boards ...
Copying IO prom to Cpu dram
....................................
{/N0/SB4/P0} Running PCI IO Controller Basic Tests
{/N0/SB4/P0} Jumping to memory 00000000.00000020 [00000010]
{/N0/SB4/P0} System PCI IO post code running from memory
{/N0/SB4/P0} @(#) lpost 5.16.0 2003/12/24 09:54
{/N0/SB4/P0} Copyright 2001-2004 Sun Microsystems, Inc. All rights reserved.
{/N0/SB4/P0} Use is subject to license terms.
{/N0/SB4/P0} Subtest: PCI IO Controller Register Initialization for aid 0x1c
{/N0/SB4/P0} Running PCI IO Controller Functional Tests