SN32F280 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 99
Version 1.1
8
8
8
RAIL TO RAIL ANALOG COMPARATOR
8.1 OVERVIEW
The micro-controller builds in 3 sets comparators (CMP0/1/2). The comparators are Rail-to-Rail structure. That means
the input/output voltage is real from Vdd~Vss. When the positive input voltage is greater than the negative input voltage,
the comparator output is high. When the positive input voltage is smaller than the negative input voltage, the comparator
output is low.
The CMnOUT and CMnIRQ bits indicate the comparator result. The CMnOUT shows the comparator result immediately,
but the CMnIRQ only indicates the event of the comparator result. The event condition is controlled by CMnG bit and
includes rising edge (CMnOUT changes from low to high), falling edge (CMnOUT changes from high to low). The
CMnIRQ = 1 condition makes the comparator interrupt service executed when CMnIE bit is set.
CMnO
CMn
G
CMnOUT
CMnIF
+
_
Vdd
Vss
CMnN1
CMnEN/CMnOEN
CMnEN/CMnMODE
CMnI
E
CMnIRQ
Comparator 0 Output
De-bounce time:
No, 2
1
~2
7
T*CMPn_PCLK
CMnDB[3:0]
CMnN2
CMnN0
CMnEN/CMnPS[1:0]
CMnP1
CMnP2
CMnP0
V
IREFn
CMnEN/CMnNS[1:0]
The comparator builds in internal reference to replace comparator external negative input voltage source and controlled
by CMPIREF[1:0] and CMPIREFEN bits. The internal reference voltage is 3V/2V/1.5V from internal LDO, or VDD. When
CMnNS[1:0] = 00b~10b, the comparator negative input is from external voltage source through CMnN0, CMnN1, or
CMnN2 pin. When CMnNS[1:0] = 11b, the comparator negative voltage source is from internal reference and
CMnN0/1/2 pins are GPIO function.
The comparator positive input terminal is controlled by CMnPS[1:0]. When CMnPS[1:0] = 01b~11b, the comparator
positive input is from CMnP0, CMnP1, or CMnP2 pin. When CMnPS[1:0] = 00b, CMnP0/1/2 pins are GPIO function.
Besides, the comparator output signal is through a de-bounce circuit to filter comparator transient status. The de-bounce
time is controlled by CMnDB[2:0] bits.
