SMART Embedded Computing MC1600, Installation And Use Manual

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System Overview
MC1600 Extreme Edge Server Installation and Use (6806870A02B) 55
1.6.2.1 Real Time Clock
A real-time clock circuit is implemented for each CPU. This circuit is backed up by an on-
board coin cell battery. The CPUs synchronize their system time to the BMC.
1.6.2.2 Trusted Platform Module (TPM)
A TPM 1.2 compliant implementation is used on the Extreme Edge Server.
The TPM is connected to the LPC interface of the processor. The SERIRQ output of the
device is connected to the SERIRQ input of the processor.
1.7 Interfaces
1.7.1 PCI Express Interfaces
Each CPU has one x8 PCIe Gen3 interface to the x16 PCIe connector on the base board.
CPU1 has two x4 PCIe Gen3 interfaces to M.2 NVMe sockets on the base board. CPU1
also has an x1 PCIe Gen2 interface to the integrated Ethernet switch, one PCIe lane used
to connect to an Ethernet MAC/PHY, and an additional PCIe lane that connects to the BMC.
CPU2 has one x4 PCIe Gen3 interface to a single M.2 NVMe socket.
There is a second Ethernet MAC/PHY device that can connect to CPU1 or CPU2 via a
single PCIe lane. These connections are described in more detail below.
1.7.1.1 PCI Express Gen3
The Integrated I/O (IIO) module of Broadwell-DE processor provides 24 lanes of PCIe Gen
3 interface [3], comprising two ports. The first port (PE1) is a x16 PCIe that can be
bifurcated to two x8, two x4 and one x8, or four x4 root ports each, and the second port
(PE2) is a x8 PCIe that can be bifurcated to two x4 root ports. Refer to
Figure 1-5 , High
Level Broadwell-DE Block Diagram on page 53 .
All PCIe Gen3 interfaces can operate as a standard PCIe root port. The processor supports
Gen1 (2.5Gb/s), Gen2 (5Gb/s) and Gen3 (8Gb/s) PCIe speeds. These speeds are
supported on all the lanes. Port bifurcation, degraded mode, lane reversal, and polarity
inversion is supported for all PCIe ports.
On the Extreme Edge Server, the x16 port (PE1) of each CPU is bifurcated into two x8
ports, of which only the first one is used. Connections to the PCIe connector are according
following table.