Functional Description
ATCA-F140 Series Installation and Use (6806800M67S)
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4.7
Base Channel Interface
The ATCA-F140 uses Broadcom BCM56334 as its base channel interface. It provides 24
10/100/1000 Mbps ports and four 10G stacking ports. It supports advanced Layer2
switching, L3 routing, ACL and key carrier protocols. The PCI Express 1x interface of the
Broadcom BCM56334 is attached to one of the PCI Express ports of the integrated
processor to provide service processor configuration and management capability to switch.
Some of the 1GbE SGMII ports from the BCM56334 have the option of being routed
through muxes to two different destinations as seen in the block diagram above. The ATCA-
F140 blade uses 2 channel or 4 channel high speed broadband 2:1
multiplexer/demultiplexer switches to perform this function. The select pins for these
mux/demux switches are routed to the FGPA. Through the P2020 local bus interface, the
service processor can program registers in the FPGA to route the SGMII ports to the
desired destination.
4.7.1
Base Channel PHYs
The ATCA-F140 uses two Broadcom BCM54680 octal PHYs, two BCM54616S PHYs, and
a BCM8727 PHY for the base channel. Each BCM54680 supports eight SGMII channels to
the BCM56334 and provides the physical layer functions for the 10/100/1000Base-T
connections and 10/100Base-TX connections to the backplane. The BCM54616S is a
single PHY that supports an SGMII channel to the BCM56334 and provides the physical
layer functions for a 10/100/1000Base-T connection to the backplane.
The BCM8727 PHY is a two port XAUI to 10Gb SFI PHY that provides the interface
between two of the Base Switch 10GbE stacking ports and the front panel SFP+ modules.
The BCM8727 requires an external SPI flash device of at least 16 Kbytes to load microcode
into the device. An AT25128B or equivalent SPI flash device will be used for this purpose.
4.7.2
ShMC Cross-Connect
Two 100 Base-Tx ports of the base channel switch are connected to the split Base Interface
ShMC port (BC1) connector at the backplane. This connection is compliant to the ShMC
cross-connect in PICMG 3.0 R3.0.
Table 4-3
Base Switch Mapping
Port Name
Destination
Front Panel Label
ge0
Base Ch 3 (LS 3)
n/a
ge1
Base Ch 4 (LS 4)
n/a
ge2
Base Ch 5 (LS 5)
n/a
