S5-115F Manual
System Overview
1.8
Redundancy Structure
1.8.1
Hardware
The CPU 942F and the input/output modules are designed with two-channel redundancy. Both
channels, referred to below as subunits, are connected via the parallel interface. The operating
system and the user program are identical in both subunits.
The parallel interface has the task of implementing event-driven synchronization of both subunits
and also data exchange. Synchronization is triggered by external interrupts (process interrupts) or
internal interrupts (time interrupts, time updates, input module accesses).
Both subunits work with the same programs in such a way that user programs are run on the same
program paths. In contrast, the operating system in both subunits does not run path-identically.
This allows an assymetrical hardware structure of the subunits, such as:
•
A programmer to a subunit
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A SINEC L1 LAN to a subunit
•
Single-channel, nonsafety-related input/output modules
•
Single-channel test outputs for safety inputs.
Parallel interface
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115F
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Features:
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Two-channel redundancy structure (2-out-of-2 system)
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Event-driven synchronous processing of the user program
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Data exchange via high-speed parallel interface
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Expanded operating system: self-test, time-driven synchronization, image comparison
Figure 1-2. Hardware Structure Overview
EWA 4NEB 811 6148-02
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