11-25
ET 200L, ET 200L-SC and ET 200L-SC IM-SC Distributed I/O Device
EWA 4NEB 780 6009-02c
The settling time (t
2
to t
3
), which is the time from when the converted value
is applied to when the specified value is obtained at the analog output, de-
pends on the load. Distinctions must be drawn between ohmic, capacitive and
inductive load.
The response time (t
1
to t
3
), which is the time from when the digital output
values apply in the internal memory of the appropriate interface to when the
specified value is reached at the analog output, is, in the worst case, the sum
of the cycle time and the settling time. The worst case is when the analog
channel is converted just before transfer of a new output value to the inter-
face, and is only transferred again after transfer and conversion of the other
channels (cycle time).
Figure 11-8 shows the response time of the analog output channels.
t
A
t
Z
t
E
t
1
t
2
t
A
= response time
t
Z
= cycle time, which corresponds to n
transfer time +1
conversion time
(n = activated modules)
t
E
= settling time
t
1
=
new digitized output value applies
t
2
=
output value accepted and converted
t
3
=
specified output value
t
3
Figure 11-8 Response Time of the Analog Output Channels
Analog Output
Module Settling
Time
Response Time
SC Analog Electronic Modules – Parameters
