Schweitzer Engineering Laboratories SEL-352-1, Instruction Manual

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4-16 Close Logic Date Code 20010731
SEL-352-1, -2 Instruction Manual
Setting Description
Trip Inputs (TRIPA, TRIPB, and TRIPC)
Use the SET G <ENTER> command to associate the three programmable breaker failure
initiate logic inputs (TRIPA, TRIPB, TRIPC) with physical inputs. Use any optoisolated input to
control these Relay Word bits. For example, if IN101 is used to indicate A-phase trip initiation,
set TRIPA = IN101. Repeat this for each input. The input settings are actually SEL
OGIC
control
equations. Use any combination of Relay Word bits according to the SEL
OGIC
control equation
criteria in Section 5: Control Logic .
Retripping Scheme Selection (RTPLOG)
Range: OFF, 1, 2, CUSTOM
Set RTPLOG to 1 to enable the instantaneous retrip logic. As soon as one of the trip inputs is
received, the SEL-352 Relay asserts the retrip outputs RTA, RTB, and RTC. Put these Relay
Word bits in an output contact equation such as OUT305 = RTA + RTB + RTC for three-pole
retrip applications. Use three output contacts, one for each retrip bit, for single-pole retripping.
No other settings are required.
Set RTPLOG to 2 to enable the time-delayed retrip logic. As soon as one of the trip initiation
inputs is received and current is flowing through the breaker, a timer is started. When the timer
expires and the current has not dropped out, the retrip outputs will assert. Again, as in Scheme 1,
set the retrip bits to an output contact.
Modify the default logic by setting RTPLOG = CUSTOM. When set to CUSTOM, all settings
are shown including the SEL
OGIC
control equations. Use these settings for a modified retrip
logic, or use it for an entirely different application. The default setting is RTPLOG = 1.
Load Detector (50LD)
Range: 0.10–45.00 A in 0.01-A steps (5 A)
0.02–9.00 A in 0.01-A steps (1 A)
The delayed retripping logic uses the load current detector 50LD setting, but you set the value
for this setting along with the load current protection logic. Use
SET <ENTER> to access the
50LD setting.
Set the 50LD (in settings for the load current protection logic) based on the same criteria as
outlined for the load current protection logic in
Section 3: Breaker Logic .
Retrip Timer Pickup (RTpu)
Range: 0–16383 cycles in 1/4-cycle steps
The RTpu timer setting defines the time interval between receipt of the trip initiation and
assertion of the retrip bits RTA, RTB, and RTC. Consider the nominal breaker trip time, the
retrip circuit, and the FCpu setting (timer for breaker failure during fault conditions).