12. Serial RapidIO Registers > Register Map
244
Tsi576 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
13800 - 138FC
Serial Port 8 Tsi576 un-initialized
All registers as for SP0, offsets 0x13000 - 0x130FC.
13900 - 139AC
Serial Port 9 Tsi576 un-initialized
Same set of registers as for SP0, offsets 0x13000 - 0x130AC. The
registers at offsets 0x130B0 - 0x130FC are excluded.
13A00 - 13AFC
Serial Port 10
All registers as for SP0, offsets 0x13000 - 0x130FC.
13B00 - 13BAC
Serial Port 11
Same set of registers as for SP0, offsets 0x13000 - 0x130AC. The
registers at offsets 0x130B0 - 0x130FC are excluded.
13C00 - 13CFC
Serial Port 12
All registers as for SP0, offsets 0x13000 - 0x130FC.
13D00 - 13DAC
Serial Port 13
Same set of registers as for SP0, offsets 0x13000 - 0x130AC. The
registers at offsets 0x130B0 - 0x130FC are excluded.
13E00 - 13EFC
Serial Port 14 Tsi576 un-initialized
All registers as for SP0, offsets 0x13000 - 0x130FC.
13F00 - 13FAC
Serial Port 15 Tsi576 un-initialized
Same set of registers as for SP0, offsets 0x13000 - 0x130AC. The
registers at offsets 0x130B0 - 0x130FC are excluded.
Fabric Global Interrupt Registers
1AA00
FAB_CTL
“Fabric Control Register” on page 382
1AA04
FAB_INT_STAT
“Fabric Interrupt Status Register” on page 384
1AA08
RIO_MC_LAT_ERR
“RapidIO Broadcast Buffer Maximum Latency Expired Error
Register” on page 386
1AA0C
RIO_MC_LAT_ERR_SET
“RapidIO Broadcast Buffer Maximum Latency Expired Override” on
page 388
1AA10 - 1ABFC
Reserved
Utility Unit Registers
1AC00
GLOB_INT_STATUS
“Global Interrupt Status Register” on page 390
1AC04
GLOB_INT_ENABLE
“Global Interrupt Enable Register” on page 392
1AC08 - 1AC10
Reserved
1AC14
RIO_PW_TIMEOUT
1AC18
RIO_PW_OREQ_STATUS
“RapidIO Port Write Outstanding Request Register” on page 395
1AFFC
Reserved
Multicast Registers
1B000
RIO0_MC_REG_VER
“RapidIO Multicast Register Version CSR” on page 397
1B004
RIO0_MC_LAT_LIMIT
“RapidIO Multicast Maximum Latency Counter CSR” on page 398
Table 36: Register Map (Continued)
Offset
Register Name
See