11. Signals > Pinlist and Ballmap
229
Tsi576 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
11.5
Pinlist and Ballmap
For more information, see the following documents:
•
Tsi576 Pinlist
•
Tsi576 Ballmap
Power Supplies
SP_AVDD
-
Port n and n+1: 3.3V supply for bias generator
circuitry. This is required to be a low-noise supply.
Refer to decoupling
recommendations in the
Tsi576
Hardware Manual
for more
information
REF_AVDD
-
Analog 1.2V for Reference Clock (S_CLK_P/N).
Clock distribution network power supply.
Refer to decoupling
recommendations in the
Tsi576
Hardware Manual
for more
information
Common Supply
VDD_IO
-
Common 3.3V supply for LVTTL I/O
Refer to decoupling
recommendations in the
Tsi576
Hardware Manual
for more
information
VSS
-
Common ground returns for digital logic
Refer to decoupling
recommendations in the
Tsi576
Hardware Manual
for more
information
VDD
-
Common 1.2V supply for digital logic
Refer to decoupling
recommendations in the
Tsi576
Hardware Manual
for more
information
SP_VDD
-
1.2V supply for CDR, Tx/Rx, and digital logic for all
RapidIO ports
For more information on
decoupling recommendations,
refer to the
Tsi576 Hardware
Manual
a. Signals for unused serial ports do not require termination and can be left as N/Cs.
Table 31: Tsi576 Signal Descriptions (Continued)
Pin Name
Type
Description
Recommended Termination
a
