Parker 590 series, Product Manual

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9-4
Control Loops
590 Series DC Digital Converter
Speed Loop
The speed loop accepts a demand from either an outside loop (i.e. position loop) or directly from
the plant and forms the error signal which is the difference between demand and feedback. The
error signal is fed into a Propor Integral compensator which produces the output of the
speed loop, i.e. the current demand signal.
The integral gain is translated into a Time Constant (secs) in the MMI which defines more
clearly the function of the compensator against a certain load time constant.
Speed Loop Synchronised with Current Loop
The proportional part of the P+I algorithm is executed immediately before each run of the
current loop, thus ensuring minimum time lag and therefore maximum bandwidth.
Combined Analog Tacho / Encoder Feedback
By using the analog tacho f/b on the Proportional part of the P + I algorithm and the encoder f/b
on the Integral part (using similar principle as in the current loop), the Converter combines
maximum transient response with the increased steady-state accuracy of the digital feedback.
Current Demand Rate Limit (di/dt)
Access to the di/dt limit is currently reserved for Parker SSD Drives personnel only in the
Reserved Menu.
This is a limit imposed on the rate of change of the current demand. It is to be used for motors
with commutation limitations, mechanical systems that cannot absorb rapid torque transients and
also as a means of limiting current overshoot for large current swings (e.g. 0
¯
200%). The
default value is set at 35% (i.e. maximum allowable change is 35% of FLC in 1/6 mains cycle)
which has no practical effect on the current response between 0 and 100%.
Field Control
Set-up Notes
The setting of the P + I gains for the current controller is done manually in much the same way
as described in Chapter 4: “Current Loop - Manual Tuning”, and one convenient way is to
switch several times from "quench" to "standby" mode and observe the current response 0
¯
50% for rise time and overshoot.
The setting of the field weakening gains is achieved by observing the armature voltage feedback
for overshoot and settling time. The EMF GAIN parameter defaults to 0.30 (real gain of 30) and
normally lies in the region 0.20 to 0.70 (larger settings normally lead to instability). The EMF
LEAD parameter should be set at around the time constant for the field current loop. It defaults
to 2.00 (200ms). Finally, the EMF LAG parameter defaults to 40.00 (4000ms) and it should
generally lie in the region of 10 to 50 times the "emf lead".
The tuning of the field weakening loop is also very dependent on the acceleration rate through
base speed and visa-versa. If armature voltage overshoot is a problem for rapid acceleration
rates, then the use of the "feedback lead/lag" compensator is recommended to limit the
overshoot as discussed above. If not, then the default values for the above bemf fbk gains are
recommended (i.e. disabled) which will probably allow further increase in the forward path
transfer function gains ("emf gain" and "emf lead") for faster field response.
In summary, the increased attenuation at the higher frequencies will allow an increase in the
gain whilst maintaining the desired phase margin. Bearing in mind that the negative angle of the
compensator lowers the angle curve, in order to maintain the desired phase margin (45 to 60
degrees) a reduction in the phase-margin frequency is required. This is the frequency at which
the log magnitude curve crosses the 0db line. Since the phase-margin frequency is indicative of
the speed of response of the system, its reduction should be kept to a minimum. This is
achievable by trying to keep the value of the corner-frequency 1 / T1 as low as possible by
setting T1 at values greater than 100ms or so. The upper limit for T1 will be dictated by the
settling time requirement.