Omron 3G8F7-CRM21, User Manual

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105
PCI Register Specifications
Section B-2
B-2-5 Interrupt Control Register (Interrupt from Board to PC)
This register is used to control interrupts from the Board to the PC.
The Interrupt Mask register is used to specify the generation of an interrupt by
a certain cause. The cause that is 1 in the Interrupt Mask register will
generate an interrupt. The applicable flag in the Interrupt Mask register must
be set to 0 when you want to confirm the cause not by an interrupt but by
polling.
When an interrupt occurs, the interrupt cause can be confirmed in the
Interrupt Cause Indication register.
The cause of the interrupt can be cleared by setting the relevant flag in the
Interrupt Clear register to 1. When all interrupt causes are cleared, the
interrupt itself is cleared.
Flags of "Interrupt
from Board to PC"
Interrupt Mask (Offset
0x0004)
Flag Bit Description
CMD_ACK 0 The acknowledgment made by the Board against the
command request made by the PC to the Board
BD_SND 1 Used when the Board notifies the PC of an event
transmission
SND_ACK 2 The acknowledgment made by the Board against the
event transmission request made by PC to the Board
REQ_RES 3 Used when the Board requests the PC of a Board
reset
Reserved 4 -
INIEND 5 The Board notifies the PC that the firmware
initialization has been completed.
The completion cause is stored in the Initialization
completion notification of the shared memory area.
REQ_ACC_ACK 6 The acknowledgment made by the Board against the
cyclic area access right request made by the PC to
the Board (a notification that the access right has
been successfully obtained)
BD_WDT 7 The interrupt cause that is generated when the
Board WDT times out
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Flag BD_WDT REQ_ACC
_ACK
INIEND Unused REQ_RES SND_ACK BD_SND CMD_ACK
Access rule R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0