Oki OKIPAGE 12i Series, Service Handbook

Page: 20 / 226

2 - 3
2.1 Main Control Board
The main control board consists of a single chip CPU, two program/font ROMs, two DRAMs, an
EEPROM, a host interface circuit, and a mechanism driving circuit.
(1) Single chip CPU
The single chip CPU is a custom CPU (32-bit internal bus, 32-bit external bus, 40.55-MHz
clock (20.75 MHz x 2) which incorporates the RISC CPU and its peripheral devices, and has
the following functions:
(2) Program and Font ROMs
The Program and Font ROMs store the equipment program and various types of fonts. Mask
ROM is used as Program and Font ROMs. The mounting locations of these Program and
Font ROMs vary depending on the type of the ROMs (for the mounting location see Section
7.4).
(3) DRAM
The DRAM is a 4MB resident memory on the main control board that stores edited data,
image data, DLL data and macro data.
(4) EEPROM
4,096-bit Electrically Erasable PROM (EEPROM), is loaded with the following kinds of data:
• Menu data
• Various counter data (page counter, drum counter)
• Adjusting parameters (LED head drive time, print start position, paper feed length)
(5) Parallel Interface
Parallel data is received from a host system via parallel interface which conforms to the
IEEE1284 specification.
Built-in device Function
Chip select controller
Bus controller
DRAM controller
DMA controller
Parallel interface controller
Serial interface controller
Video output port
LED STB output port
Timer
Serial I/O port
I/O port
Control of ROM, DRAM and I/O device
Transfer of image data from DRAM to video output port
Control of Centronics parallel interface
Control of RS-232C serial interface
Control of LED head
Generation of various control timing
Monitoring of paper running and paper size
Control of operator panel, EEPROM, and options
Input and output of sensor and motor signals