NXP Semiconductors UDA1352TS, Datasheet

Page: 2 / 52

2002 Nov 22 2
NXP Semiconductors Preliminary specification
48 kHz IEC 60958 audio DAC UDA1352TS
CONTENTS
1 FEATURES
1.1 General
1.2 Control
1.3 IEC 60958 input
1.4 Digital sound processing and DAC
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 ORDERING INFORMATION
5 QUICK REFERENCE DATA
6 BLOCK DIAGRAM
7 PINNING
8 FUNCTIONAL DESCRIPTION
8.1 Clock regeneration and lock detection
8.2 Mute
8.3 Auto mute
8.4 Data path
8.5 Control
9 L3-BUS DESCRIPTION
9.1 General
9.2 Device addressing
9.3 Register addressing
9.4 Data write mode
9.5 Data read mode
9.6 Initialization string
10 I
2
C-BUS DESCRIPTION
10.1 Characteristics of the I
2
C-bus
10.2 Bit transfer
10.3 Byte transfer
10.4 Data transfer
10.5 Start and stop conditions
10.6 Acknowledgment
10.7 Device address
10.8 Register address
10.9 Write and read data
10.10 Write cycle
10.11 Read cycle
11 SPDIF SIGNAL FORMAT
11.1 SPDIF channel encoding
11.2 SPDIF hierarchical layers for audio data
11.3 SPDIF hierarchical layers for digital data
11.4 Timing characteristics
12 REGISTER MAPPING
12.1 SPDIF mute setting (write)
12.2 Power-down settings (write)
12.3 Volume control left and right (write)
12.4 Sound feature mode, treble and bass boost
settings (write)
12.5 Mute (write)
12.6 Polarity (write)
12.7 SPDIF input settings (write)
12.8 Interpolator status (read-out)
12.9 SPDIF status (read-out)
12.10 Channel status (read-out)
12.11 FPLL status (read-out)
13 LIMITING VALUES
14 THERMAL CHARACTERISTICS
15 CHARACTERISTICS
16 TIMING CHARACTERISTICS
17 APPLICATION INFORMATION
18 PACKAGE OUTLINE
19 SOLDERING
19.1 Introduction to soldering surface mount
packages
19.2 Reflow soldering
19.3 Wave soldering
19.4 Manual soldering
19.5 Suitability of surface mount IC packages for
wave and reflow soldering methods
20 DATA SHEET STATUS
21 DISCLAIMERS
22 TRADEMARKS