NXP Semiconductors UDA1352TS, Datasheet

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2002 Nov 22 30
NXP Semiconductors Preliminary specification
48 kHz IEC 60958 audio DAC UDA1352TS
12.5 Mute (write)
Table 31 Register address 13H
Table 32 Description of register bits
BIT 15 14 13 12 11 10 9 8
Symbol QMUTE MT GS
− − − − −
Default 0 1 0
− −
0 0 0
BIT 7 6 5 4 3 2 1 0
Symbol
− − − − − − − −
Default
− − − − − − − −
BIT SYMBOL DESCRIPTION
15 QMUTE Quick mute function. A 1-bit value to set the quick mute mode. If this bit is logic 0, then
the soft mute mode is selected. If this bit is logic 1, then the quick mute mode is selected.
Default value 0.
14 MT Mute. A 1-bit value to set the mute function. If this bit is logic 0, then the audio output is not
muted (unless pin MUTE is logic 1). If this bit is logic 1, then the audio output is muted.
Default value 1.
13 GS Gain select. A 1-bit value to set the gain of the interpolator path. If this bit is logic 0, then
the gain is 0 dB. If this bit is logic 1, then the gain is 6 dB. Default value 0.
12 to 11
−
reserved
10 to 8
−
When writing new settings via the L3-bus or I
2
C-bus interface, these bits should always
remain at logic 0 (default value) to guarantee correct operation.
7 to 0
−
reserved