2002 Nov 22
28
NXP Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352TS
12.4
Sound feature mode, treble and bass boost settings (write)
Table 26
Register address 12H
Table 27
Description of register bits
Table 28
Sound feature mode
Table 29
Treble settings
BIT
15
14
13
12
11
10
9
8
Symbol
M1
M0
TR1
TR0
BB3
BB2
BB1
BB0
Default
0
0
0
0
0
0
0
0
BIT
7
6
5
4
3
2
1
0
Symbol
−
−
−
−
−
−
−
−
Default
−
−
−
−
−
−
−
−
BIT
SYMBOL
DESCRIPTION
15 to 14
M[1:0]
Sound feature mode.
A 2-bit value to program the sound processing filter sets (modes) of
bass boost and treble. Default value 00; see Table 28.
13 to 12
TR[1:0]
Treble settings.
A 2-bit value to program the treble setting. The set is selected by the
mode bits. Default value 00; see Table 29.
11 to 8
BB[3:0]
Bass boost settings.
A 4-bit value to program the bass boost settings. The set is selected
by the mode bits. Default value 0000; see Table 30.
7 to 0
−
reserved
M1
M0
MODE SELECTION
0
0
flat set (default)
0
1
minimum set
1
0
1
1
maximum set
TR1
TR0
FLAT SET (dB)
MINIMUM SET (dB)
MAXIMUM SET (dB)
0
0
0
0
0
0
1
0
2
2
1
0
0
4
4
1
1
0
6
6
