NuMicro® NUC029LEE/NUC029SEE
32-bit Arm
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Cortex
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-M0 Microcontroller
Aug, 2018
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6.15.5.5 Byte Suspend Function
In Master mode, if REORDER (SPI_CNTRL[19]) is set to 1, a suspend interval of 0.5 ~ 15.5 SPI
clock periods will be inserted by hardware between two successive bytes in a transaction word.
Both settings of byte suspend interval and word suspend interval are configured in SP_CYCLE
(SPI_CNTRL[15:12]).
SPIn_CLK
SPIn_MOSI0
SPIn_MISO0
TX0[30]
TX0[24]
TX0[23]
TX0[22]
TX0[16]
RX0[30]
RX0[24]
RX0[22]
RX0[16]
MSB
RX0[31]
CLKP=0
CLKP=1
Suspend
Interval
1st Transaction Byte
2nd Transaction Byte
RX0[23]
MSB
TX0[31]
Figure 6.15-7 Timing Waveform for Byte Suspend
6.15.5.6 Slave 3-wire Mode
When NOSLVSEL (SPI_CNTRL2[8]) is set by software to enable the Slave 3-wire mode, the SPI
controller can work with no slave select signal in Slave mode. The NOSLVSEL bit only takes
effect in Slave mode. Only three pins, SPIn_CLK, SPIn_MISO0, and SPIn_MOSI0, are required
to communicate with a SPI master. The SPIn_SS pin can be configured as a GPIO. When the
NOSLVSEL bit is set to 1, the SPI slave will be ready to transmit/receive data after the GO_BUSY
bit is set to 1. As the number of received bits meets the requirement which defined in
TX_BIT_LEN (SPI_CNTRL[7:3]), the unit-transfer interrupt flag, IF (SPI_CNTRL[16]), will be set to
1.
Note:
In Slave 3-wire mode, the SS_LTRIG (SPI_SSR[4]) should be set as 1.
6.15.5.7 Dual I/O Mode
The SPI controller also supports Dual I/O transfer when setting the DUAL_IO_EN
(SPI_CNTRL2[13]) to 1. Many general SPI flashes support Dual I/O transfer. The DUAL_IO_DIR
(SPI_CNTRL2[12]) is used to define the direction of the transfer data. When the DUAL_IO_DIR
bit is set to 1, the controller will send the data to external device. When the DUAL_IO_DIR bit is
set to 0, the controller will read the data from the external device. This function supports 8, 16, 24,
and 32-bit data transfer.
The Dual I/O mode is not supported when the Slave 3-wire mode or the Byte Reorder function is
enabled.
If both the DUAL_IO_EN and DUAL_IO_DIR bits are set as 1, the SPIn_MOSI0 is the even bit
data output and the SPIn_MISO0 will be set as the odd bit data output. If the DUAL_IO_EN is set
as 1 and DUAL_IO_DIR is set as 0, both the SPIn_MISO0 and SPIn_MOSI0 will be set as data
input ports.
