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NuMicro® NUC029LEE/NUC029SEE
32-bit Arm
®
Cortex
®
-M0 Microcontroller
Aug, 2018
Page
315
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497
Rev 1.00
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6.12.5.3 RTC Read/Write Enable
AER (AER[15:0] RTC Register Access Enable Password) is served as read/write access of RTC
registers to unlock register read/write protection function. If AER[15:0] is written to 0xA965, user
can read ENF (AER[16] RTC Register Access Enable Flag) bit status to check the RTC registers
are read/write accessible or locked. Once ENF bit enabled, RTC access enable function will keep
effect at least 1024 RTC clocks (about 30ms) and ENF bit will be cleared automatically after 1024
RTC clocks.
The
RTC control registers access attribute when
ENF
is 1 and 0 are shown in below table.
Register
ENF=1
ENF=0
INIR
R/W
R/W
AER
R/W
R/W
FCR
R/W
Not available
TLR
R/W
R
CLR
R/W
R
TSSR
R/W
R/W
DWR
R/W
R
TAR
R/W
Not available
CAR
R/W
Not available
LIR
R
R
RIER
R/W
R/W
RIIR
R/W
R/W
TTR
R/W
Not available
SPRCTL
R/W
Not available
SPR0-SPR19
R/W
Not available
6.12.5.4 Frequency Compensation
The RTC source clock may not precise to exactly 32768 Hz and the FCR register (Frequency
Compensation Register) allows user to make digital compensation to the RTC source clock only if
the frequency of RTC source clock is in the range from 32761 Hz to 32776 Hz.
Integer Part Of Detected Value
INTEGER
(FCR[11:8])
Integer Part Of Detected Value
INTEGER
(FCR[11:8])
32776
1111
32768
0111
32775
1110
32767
0110
32774
1101
32766
0101
32773
1100
32765
0100
32772
1011
32764
0011
32771
1010
32763
0010