Nuvoton NuMicro NUC029 Series, Technical Reference Manual, Page: 128 / 497

NuMicro® NUC029LEE/NUC029SEE
32-bit Arm
®
Cortex
®
-M0 Microcontroller
Aug, 2018 Page 128 of 497
Rev 1.00
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Clock status Register (CLKSTATUS)
These bits of this register are used to monitor if the chip clock source stable or not, and whether clock
switch failed.
Register Offset R/W Description Reset Value
CLKSTATUS
0x0C R/W Clock Status Monitor Register 0x0000_00XX
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
CLK_SW_
FAIL
Reserved OSC48M_STB
OSC22M_
STB
OSC10K_
STB
PLL_STB XTL32K_STB XTL12M_STB
Bits Description
[31:8] Reserved Reserved.
[7] CLK_SW_FAIL
Clock Switching Fail Flag (Read Only)
0 = Clock switching success.
1 = Clock switching failure.
This bit is an index that if current system clock source is match as user defined at HCLK_S
(CLKSEL[2:0]). When user switch system clock, the system clock source will keep old
clock until the new clock is stable. During the period that waiting new clock stable, this bit
will be an index shows system clock source is not match as user wanted.
[6]
Reserved
Reserved.
[5]
OSC48M_STB
48 MHz Internal High Speed RC Oscillator (HIRC48) Clock Source Stable Flag (Read
Only)
0 = 48MHz internal high speed RC oscillator (HIRC48) clock is not stable or disabled.
1 = 48MHz internal high speed RC oscillator (HIRC48) clock is stable and enabled.
[4] OSC22M_STB
22.1184 MHz Internal High Speed RC Oscillator (HIRC) Clock Source Stable Flag
(Read Only)
0 = 22.1184 MHz internal high speed RC oscillator (HIRC) clock is not stable or disabled.
1 = 22.1184 MHz internal high speed RC oscillator (HIRC) clock is stable and enabled.
[3] OSC10K_STB
Internal 10 KHz Low Speed Oscillator (LIRC) Clock Source Stable Flag (Read Only)
0 = 10 kHz internal low speed RC oscillator (LIRC) clock is not stable or disabled.
1 = 10 kHz internal low speed RC oscillator (LIRC) clock is stable and enabled.
[2] PLL_STB
Internal PLL Clock Source Stable Flag (Read Only)
0 = Internal PLL clock is not stable or disabled.
1 = Internal PLL clock is stable in normal mode.