197
CHAPTER 13 STANDBY FUNCTION
(c) Clear upon RESET input
As is the case with normal reset operation, a program is executed after branch to the reset vector address.
Figure 13-3. HALT Mode Release by RESET Input
Remarks 1. f
X
: main system clock oscillation frequency
2. Values in parentheses when operated at f
x
= 5.0 MHz
Table 13-2. Operation after HALT Mode Release
Release Source
MK
××
PR
××
IE
ISP
Operation
Maskable interrupt
0
0
0
×
Next address instruction execution
request
0
0
1
×
Interrupt service execution
0
1
0
1
Next address instruction execution
0
1
×
0
0
1
1
1
Interrupt service execution
1
×
×
×
HALT mode hold
Non-maskable interrupt
–
–
×
×
Interrupt service execution
request
RESET input
–
–
×
×
Reset processing
Remark
×
: Don’t care
HALT
Instruction
RESET
Signal
Operating
Mode
Clock
Reset
Period
HALT Mode
Oscillation
Oscillation
stop
Oscillation
Stabilization
Wait Status
Operating
Mode
Oscillation
Wait
(2
17
/f
x
: 26.2 ms)
Summary of Contents for NEC PD78081(A)
Page 23: ...xii MEMO...
Page 37: ...14 CHAPTER 1 OUTLINE MEMO...
Page 47: ...24 CHAPTER 2 PIN FUNCTION MEMO...
Page 91: ...68 CHAPTER 4 PORT FUNCTIONS MEMO...
Page 125: ...102 CHAPTER 6 8 BIT TIMER EVENT COUNTERS 5 AND 6 MEMO...
Page 157: ...134 CHAPTER 10 A D CONVERTER MEMO...
Page 193: ...170 CHAPTER 11 SERIAL INTERFACE CHANNEL 2 MEMO...
Page 253: ...230 CHAPTER 16 INSTRUCTION SET MEMO...