112
CHAPTER 8 CLOCK OUTPUT CONTROL CIRCUIT
8.2 Clock Output Control Circuit Configuration
The clock output control circuit consists of the following hardware.
Table 8-1. Clock Output Control Circuit Configuration
Item
Configuration
Timer clock select register 0 (TCL0)
Port mode register 3 (PM3)
Figure 8-2. Clock Output Control Circuit Block Diagram
Control register
Internal Bus
f
XX
f
XX
/2
f
XX
/2
2
f
XX
/2
3
f
XX
/2
4
f
XX
/2
5
f
XX
/2
6
f
XX
/2
7
CLOE TCL03 TCL02 TCL01 TCL00
P35
Output Latch
Synchronizing
Circuit
4
PM35
Selector
Timer Clock Select Register 0
Port Mode Register 3
PCL /P35
Summary of Contents for NEC PD78081(A)
Page 23: ...xii MEMO...
Page 37: ...14 CHAPTER 1 OUTLINE MEMO...
Page 47: ...24 CHAPTER 2 PIN FUNCTION MEMO...
Page 91: ...68 CHAPTER 4 PORT FUNCTIONS MEMO...
Page 125: ...102 CHAPTER 6 8 BIT TIMER EVENT COUNTERS 5 AND 6 MEMO...
Page 157: ...134 CHAPTER 10 A D CONVERTER MEMO...
Page 193: ...170 CHAPTER 11 SERIAL INTERFACE CHANNEL 2 MEMO...
Page 253: ...230 CHAPTER 16 INSTRUCTION SET MEMO...