93
CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
6.4.2 External event counter operation
The external event counter counts the number of external clock pulses to be input to the TI5/PI00/TO5 and TI6/
P101/TO6 pins with 8-bit timer registers 5 and 6 (TM5 and TM6).
TM5 and TM6 are incremented each time the valid edge specified with the timer clock select register 5 and 6 (TCL5
and TCL6) is input. Either the rising or falling edge can be selected.
When the TM5 and TM6 counted values match the values of 8-bit compare registers 50 and 60 (CR50 and CR60),
TM5 and TM6 are cleared to 0 and the interrupt request signals (INTTM5 and INTTM6) are generated.
Figure 6-10. 8-Bit Timer Mode Control Register Setting for External Event Counter Operation
Remarks 1. n = 5, 6
2.
×
: don’t care
Figure 6-11. External Event Counter Operation Timings (with Rising Edge Specification)
Remarks 1. N = 00H to FFH
2. n = 5, 6
1
TCEn
0
TMCn6
0
0
×
LVSn LVRn TMCn1 TOEn
TMCn
×
×
0
TOn output disable
Clear and start mode on match of TMn and CRn0
TMn operation enable
00
01
03
N
Count Clock
TMn Count Value
CRn0
TCEn
INTTMn
05
N-1
00
02
03
01
02
04
N
Summary of Contents for NEC PD78081(A)
Page 23: ...xii MEMO...
Page 37: ...14 CHAPTER 1 OUTLINE MEMO...
Page 47: ...24 CHAPTER 2 PIN FUNCTION MEMO...
Page 91: ...68 CHAPTER 4 PORT FUNCTIONS MEMO...
Page 125: ...102 CHAPTER 6 8 BIT TIMER EVENT COUNTERS 5 AND 6 MEMO...
Page 157: ...134 CHAPTER 10 A D CONVERTER MEMO...
Page 193: ...170 CHAPTER 11 SERIAL INTERFACE CHANNEL 2 MEMO...
Page 253: ...230 CHAPTER 16 INSTRUCTION SET MEMO...