NEC NEC PD78081(A), User Manual

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CHAPTER 11 SERIAL INTERFACE CHANNEL 2
SI2
SCK2 1 2 3 4 5 6 7 8
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
SO2 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
SRIF
Transfer Start at the Falling Edge of SCK2
End of Transfer
(2) Communication operation
In the 3-wire serial I/O mode, data transmission/reception is performed in 8-bit units. Data is transmitted/
received bit by bit in synchronization with the serial clock.
Transmit shift register (TXS/SIO2) and receive shift register (RXS) shift operations are performed in
synchronization with the fall of the serial clock SCK2. Then transmit data is held in the SO2 latch and output
from the SO2 pin. Also, receive data input to the SI2 pin is latched in the receive buffer register (RXB/SIO2)
on the rise of SCK2.
At the end of an 8-bit transfer, the operation of the TXS/SIO2 or RXS stops automatically, and the interrupt
request flag (SRIF) is set.
Figure 11-12. 3-Wire Serial I/O Mode Timing
(3) MSB/LSB switching as the start bit
The 3-wire serial I/O mode enables to select transfer to start from MSB or LSB.
Figure 11-13 shows the configuration of the transmission shift register (TXS/SIO2) and internal bus. As shown
in the figure, MSB/LSB can be read/written in reverse form.
MSB/LSB switching as the start bit can be specified with bit 2 (CSIM22) of the serial operating mode register
2 (CSIM2).
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