85
CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
Figure 6-3. Timer Clock Select Register 5 Format
Note
The timer output (PWM output) cannot be used in cases where the clock is being input from an external
source.
Caution
When rewriting TCL5 to other data, stop the timer operation beforehand.
Remarks 1. f
XX
: Main system clock frequency (f
X
or f
X
/2)
2. f
X
: Main system clock oscillation frequency
3. TI5
: 8-bit timer register 5 input pin
4. MCS : Oscillation mode selection register (OSMS) bit 0
5. Values in parentheses when operated at f
X
= 5.0 MHz
0
0
0
0
TCL53 TCL52 TCL51 TCL50
7
6
5
4
3
2
1
0
Symbol
TCL5
FF52H
00H
R/W
Address
After Reset
R/W
TCL53 TCL52 TCL51 TCL50
0
0
0
0
TI5 falling edge
Note
0
0
0
1
TI5 rising edge
Note
0
1
1
0
0
1
1
1
f
XX
/2
f
X
/2
(2.5 MHz)
f
X
/2
2
(1.25 MHz)
1
0
0
0
f
XX
/2
2
f
X
/2
2
(1.25 MHz)
f
X
/2
3
(625 kHz)
0
1
0
0
0
1
0
1
2f
XX
Setting prohibited
f
X
(5.0 MHz)
f
XX
f
X
(5.0 MHz)
f
X
/2
(2.5 MHz)
1
0
0
1
f
XX
/2
3
f
X
/2
3
(625 kHz)
f
X
/2
4
(313 kHz)
1
0
1
0
f
XX
/2
4
f
X
/2
4
(313 kHz)
f
X
/2
5
(156 kHz)
1
0
1
1
f
XX
/2
5
f
X
/2
5
(156 kHz)
f
X
/2
6
(78.1 kHz)
1
1
0
0
f
XX
/2
6
f
X
/2
6
(78.1 kHz)
f
X
/2
7
(39.1 kHz)
1
1
0
1
f
XX
/2
7
f
X
/2
7
(39.1 kHz)
f
X
/2
8
(19.5 kHz)
1
1
1
0
f
XX
/2
8
f
X
/2
8
(19.5 kHz)
f
X
/2
9
(9.8 kHz)
1
1
1
1
f
XX
/2
9
f
X
/2
9
(9.8 kHz)
f
X
/2
10
(4.9 kHz)
MCS=1
8-Bit Timer Register 5 Count Clock Selection
MCS=0
Other than above
Setting prohibited
f
XX
/2
11
f
X
/2
11
(2.4 kHz)
f
X
/2
12
(1.2 kHz)
Summary of Contents for NEC PD78081(A)
Page 23: ...xii MEMO...
Page 37: ...14 CHAPTER 1 OUTLINE MEMO...
Page 47: ...24 CHAPTER 2 PIN FUNCTION MEMO...
Page 91: ...68 CHAPTER 4 PORT FUNCTIONS MEMO...
Page 125: ...102 CHAPTER 6 8 BIT TIMER EVENT COUNTERS 5 AND 6 MEMO...
Page 157: ...134 CHAPTER 10 A D CONVERTER MEMO...
Page 193: ...170 CHAPTER 11 SERIAL INTERFACE CHANNEL 2 MEMO...
Page 253: ...230 CHAPTER 16 INSTRUCTION SET MEMO...