70
CHAPTER 5 CLOCK GENERATOR
Figure 5-1. Block Diagram of Clock Generator
Main
System
Clock
Oscillator
X2
X1
STOP
PCC2 PCC1
Internal Bus
Standby
Control
Circuit
2
f
XX
2
2
f
XX
2
3
f
XX
2
4
f
XX
Prescaler
Clock to
Peripheral
Hardware
Prescaler
Oscillation Mode
Selection Register
f
XX
CPU Clock
(f
CPU
)
Scaler
Selector
f
X
2
f
X
MCS
Processor Clock Control Register
PCC0
3
Selector
Summary of Contents for NEC PD78081(A)
Page 23: ...xii MEMO...
Page 37: ...14 CHAPTER 1 OUTLINE MEMO...
Page 47: ...24 CHAPTER 2 PIN FUNCTION MEMO...
Page 91: ...68 CHAPTER 4 PORT FUNCTIONS MEMO...
Page 125: ...102 CHAPTER 6 8 BIT TIMER EVENT COUNTERS 5 AND 6 MEMO...
Page 157: ...134 CHAPTER 10 A D CONVERTER MEMO...
Page 193: ...170 CHAPTER 11 SERIAL INTERFACE CHANNEL 2 MEMO...
Page 253: ...230 CHAPTER 16 INSTRUCTION SET MEMO...