NEC MuPD70F3187, User Manual

Page: 690 / 1053

690
Chapter 17 Clocked Serial Interface 3 (CSI3)
User’s Manual U16580EE3V1UD00
Figure 17-7: CSIBUF Status Register 3n (SFA3n)(3/3)
Remark:
μ
PD70F3187: n = 0, 1
μ
PD70F3447: n = 0
SFPn3 SFPn2 SFPn1 SFPn0 CSIBUFn Pointer Status
0H to FH
(0 to 15)
• In the single mode (TRMDn bit of the CSIM3n
register = 0), the “number of transfer data remaining
in CSIBUFn register (CSIBUFn pointer value for
writing – CSIBUFn pointer value for SIO3n loading)”
can be read.
• In the consecutive mode (TRMDn bit of the CSIM3n
register = 1), the “number of data completely
transferred (value of CSIBUFn pointer for SIO3n
loading/storing)” can be read. If the SFPn3 to
SFPn0 bits are 0H, however, the number of
transferred data is as follows, depending on the
setting of the SFEMPn bit.
When SFEMPn bit = 0:
Number of transferred data = 0
When SFEMPn bit = 1:
Number of transferred data = 16 or
status before starting transfer (before writing
transfer data)
Caution: These bits are cleared to 0 in synchronization with the operating clock
when the FPCLRn bit = 1. However, the values of these bits are held until
the CSICAEn bit of the CSIM3n register is cleared to 0 or the FPCLRn bit
is set to 1.