NEC mPD780973 Series, Preliminary User'S Manual

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CHAPTER 7 16-BIT TIMER 0 TM0
7.6 16-Bit Timer 0 Cautions
(1) Timer start errors
An error with a maximum of one clock may occur until counting is started after timer start. This is because the
16-bit timer register (TM0) is started asynchronously with the count pulse.
Figure 7-9. 16-Bit Timer Register Start Timing
TM0 count value
0000H 0001H 0002H 0004H
Count pulse
Timer start
0003H
(2) Capture register data retention timings
If the valid edge of the TI0m/P4m pin is input during 16-bit capture register 0m (CR0m) read, CR0m performs
capture operation, but the capture value is not guaranteed. However, the interrupt request flag (INTTM0m) is
set upon detection of the valid edge.
Figure 7-10. Capture Register Data Retention Timing
Count pulse
TM0 count value
Edge input
Interrupt request flag
Capture read signal
CR0m interrupt value
N N+1 N+2 M M+1 M+2
X N+1
Capture operation
Remark m = 0 to 2
(3) Valid edge setting
Set the valid edge of the TI0m/P4m pin after setting bit 2 (TMC02) of the 16-bit timer mode control register to
0, and then stopping timer operation. Valid edge setting is carried out with bits 2 to 7 (ESm0 and ESm1) of the
prescaler mode register (PRM0).
Remark m = 0 to 2