Mitsubishi q64rd, User Manual

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MELSEC-Q
3 SPECIFICATIONS
3.3 I/O Signals Transferred to/from CPU
This section describes the I/O signal assignment and signal functions.
3.3.1 I/O signal list
The following are the I/O signals of the Q64RD/Q64RD-G.
The I/O numbers (X/Y) given in this chapter and later assume that the first I/O number
of the Q64RD/Q64RD-G is set to 0.
Input Signal (Signal Direction:
Programmable controller CPU Q64RD/Q64RD-G)
Output Signal (Signal Direction:
Programmable controller CPU Q64RD/Q64RD-G)
Device No. Signal name Device No. Signal name
X0 Module ready Y0 Reserved
X1 CH1 Offset/Gain Setting Status Signal Y1 CH1 Offset Setting Request
X2 CH2 Offset/Gain Setting Status Signal Y2 CH1 Gain Setting Request
X3 CH3 Offset/Gain Setting Status Signal Y3 CH2 Offset Setting Request
X4 CH4 Offset/Gain Setting Status Signal Y4 CH2 Gain Setting Request
X5 Y5 CH3 Offset Setting Request
X6 Y6 CH3 Gain Setting Request
X7 Y7 CH4 Offset Setting Request
X8
Reserved
Y8 CH4 Gain Setting Request
X9
Operating Condition Setting Completion
Signal
Y9 Operating Condition Setting Request
XA Offset/Gain Setting Mode Status Flag YA User Range Write Request
XB Reserved YB
XC Disconnection Detection Signal YC
XD Warning Output Signal YD
XE Conversion Completion Flag YE
Reserved
XF Error Flag YF Error Clear Request
POINT
The reserved signals marked are used by the system and are unavailable for the
user. Should they be turned on/off in a sequence program, we cannot guarantee
the functions of the Q64RD/Q64RD-G.
REMARK
Between the Q64RD/Q64RD-G whose first 5 digits of product information are 07071
or earlier and those of 07072 or later, the Conversion Completion Flag (XE)
operation is different.
For details, refer to Appendix 2.2 and 2.3.