- 96 -
Symptom
Check point
7
*When the counter values of the pulse
*Are the counter values read in the order of high-order
counter are always read out, some counter
bytes (2
~2
) to low-order bytes (2 ~2 ) ?
23
16
7
0
values seemed to be wrong.
Unless the PULSE COUNTER is read out starting from
high-order bytes, the counter value may become wrong.
*In order to implement an optimized compilation, some
compilers may not compile data in the sequence provided
in the source list. In such case, the optimum compilation
function shall be canceled.
When C language is used,
see Chapter 16, too.
8
*Sometimes incorrect speed data is
*Are the speed data read in the order of high-order
indicated.
bytes (2
~2
) to low-order bytes (2 ~2 ) ?
23
16
7
0
Unless the speed data is read out starting from
high-order bytes, the counter value may become wrong.
*Aren't you trying to read an extremely low speed whose
data length exceeds 3 bytes?
Note that an extra low speed at or less than approximately
9.5 Hz cannot be read.
9
*The CNTINT interrupt seems to be
*Does the counter value of the PULSE COUNTER overflow
generated at a counter value different
because there is any PLS COMPARE REGISTER where data is
from the set value.
not set yet?
PLS COMPARE REGISTER is initialized to the overflow value
of 800000
at POWER ON/RESET, so the CNTINT signal is
H
generated at the overflow value if there is any
PLS COMPARE REGISTER where data is not set yet.
Put the unused COMP INT of COMPARE REGISTER into a
disabled state by the PULSE COUNTER INITIALIZE command.
10 *Output pulse speed deviates from
*In the high speed area, there can be a conflict between
the specified value.
the actual and specified speeds.
For details, see Section 5-16.
11 *The acceleration/deceleration constant
*Is DRIVE TYPE different from the contents of the specified
seems to be different from the set
data? Note that the contents of the data set in RATE
URATE/DRATE value.
differ depending on the DRIVE TYPE selected by the
SPEC INITIALIZE1.
12 *The PULSE COUNTER failed to the count
*Is a proper external clock counting method selected ?
external clock correctly.
When you selected the external clock for the pulse
counter operation clock using the PULSE COUNTER INITIALIZE
Command, you must specify the clock counting type using
the same command. For details, see Section 6-5.
13 *The DIFFERENTIAL COUNTER failed to
*Is a proper external clock counting method is selected ?
correctly count a deviation between
Using the DFL COUNTER INITIALIZE Command, you must specify
the MCC05v2 pulse and the external clock.
a proper clock counting approach on the DIFFERENTIAL
COUNTER.
For details, see Section 6-12.
*Is the ratio between the MCC05v2 output clock and the
external clock is set to 1:1. If not, adjust them to 1:1
using the clock-to-DIFFERENTIAL COUNTER division function,
an applied function.
14 *The positioning complete signal by DFLINT
*Check if both COMPARE REGISTERS1 and 2 are enabled.
is also generated for the excessive
DFLINT is OR of the COMPARE REGISTERS1 and 2, thus if
deviation.
both of them are made enable, it is difficult for DFLINT
to identify the positioning complete from the
excessive deviation.
This identification is available from the STATUS3.
Summary of Contents for C-875
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