Kontron QSEVEN-Q7AL User Manual Download | Manualshive

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QSEVEN-Q7AL - Rev.1.0

www.kontron.com

// 46

Sub-Screen

Function

Second level Sub-Screen / Description

RC ACPI Setting>
(continued)

Native ASPM>

On enable, windows will control the ASPM support for the device. If
disabled, the BIOS will [Enable, Disable]

RTD3 Settings>

RTD3 Support>

Enable or disable Runtime D3 support
[Enabled, Disabled]

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Summary of Contents for QSEVEN-Q7AL

Page 1: ...USER GUIDE www kontron com 1 QSEVEN Q7AL Doc Rev 1 0 Doc ID 1062 0408...

Page 2: ...QSEVEN Q7AL Rev 1 0 www kontron com 2 This page has been intentionally left blank...

Page 3: ...be suitable for the specified use without further testing or modification Kontron expressly informs the user that this user guide only contains a general description of processes and instructions whic...

Page 4: ...your risk To minimize the risks associated with your products and applications you should provide adequate design and operating safeguards You are solely responsible for compliance with all legal regu...

Page 5: ...Kontron contacts by visiting http www kontron com support Customer Service As a trusted technology innovator and global solutions provider Kontron extends its embedded market strengths into a service...

Page 6: ...d by the law may endanger your life health and or result in damage to your material ESD Sensitive Device This symbol and title inform that the electronic boards and their components are sensitive to s...

Page 7: ...re performing any work on this product Earth ground connection to vehicle s chassis or a central grounding point shall remain connected The earth ground cable shall be the last cable to be disconnecte...

Page 8: ...ct then re pack it in the same manner as it was delivered Special care is necessary when handling or unpacking the product See Special Handling and Unpacking Instruction Quality and Environmental Mana...

Page 9: ...dition and Standards Approvals 18 4 3 Mainboard View and I O Locations 19 4 4 Mechanical Specification 21 4 5 4 5 1 Qseven Q7AL Mechanical Dimensions 21 4 5 2 Heat Spreader Mechanical Dimensions 22 Th...

Page 10: ...hell 65 9 3 1 2 Exiting the uEFI Shell 65 uEFI Shell Scripting 66 9 4 9 4 1 Startup Scripting 66 9 4 2 Create a Startup Script 66 9 4 3 Example of Startup Scripts 66 9 4 3 1 Execute Shell Script on ot...

Page 11: ...seven Q7AL 15 Figure 3 Top View Qseven Q7AL 19 Figure 4 Rear View Qseven Q7AL 20 Figure 5 Front View Qseven Q7AL 20 Figure 6 Back View Qseven Q7AL 20 Figure 7 Module Top Placement measurement in mm 21...

Page 12: ...special features and is not intended to be a standard PC textbook New users are recommended to study the short installation procedure stated in the following chapter before switching on the power All...

Page 13: ...ory down non ECC for commercial variants ECC for Industrial variants From 2 GB up to 64 GB eMMC 5 0 Flash option 2x SATA 6 Gb s 4x PCIe x1 Gen 2 1x GbE LAN 2x USB 3 0 QSEVEN port 0 1 5x USB 2 0 Host Q...

Page 14: ...evaluate the end product to ensure the requirements of the IEC62368 1 safety standard are met The module must be installed in a suitable mechanical electrical and fire enclosure The system in its encl...

Page 15: ...QSEVEN Q7AL Rev 1 0 www kontron com 15 4 Product Specification Block Diagram 4 1 The following figure displays the Qseven Q7AL module s system block diagram Figure 2 Block Diagram of Qseven Q7AL...

Page 16: ...ule TPM Incorporated Complex Programmable Logic Devices CPLD The Qseven Q7AL design shall incorporate a Altera MAX10 CPLD controller which will handle the following Power Sequencing Status and control...

Page 17: ...I2C interfaces which are derived from the SoC GPIO 8x general purpose inputs outputs Internal Header and Jumper MIPI Connector option 1x MIPI CSI2 via onboard connector according to QSEVEN Specificat...

Page 18: ...ing to IEC 60068 2 78 Standards Approvals Electromagnetic Compatibility EMC and Interference EMI Emissions Conducted in standard available chassis Compliant to the requirements of EN55032 2012 AC 2013...

Page 19: ...QSEVEN Q7AL Rev 1 0 www kontron com 19 Mainboard View and I O Locations 4 4 Figure 3 Top View Qseven Q7AL 1 CPU 2 Memory down 3 Qseven connector 4 CPLD JTAG connector 5 MIPI CSI2 Connector 2 1 3 4 5...

Page 20: ...L Rev 1 0 www kontron com 20 Figure 4 Rear View Qseven Q7AL 1 Qseven Connector 2 Memory down rear side Figure 5 Front View Qseven Q7AL Figure 6 Back View Qseven Q7AL 2 1 CPLD JTAG connector MIPI CSI2...

Page 21: ...7AL Rev 1 0 www kontron com 21 Mechanical Specification 4 5 4 5 1 Qseven Q7AL Mechanical Dimensions Figure 7 Module Top Placement measurement in mm Figure 8 Module Bottom Placement Mirrored measuremen...

Page 22: ...0 www kontron com 22 4 5 2 Heat Spreader Mechanical Dimensions Figure 9 Heat Spreader Part Number for Commercial Grade Processor 1061 8514 Figure 10 Heat Spreader Part Number for Industrial Grade Pro...

Page 23: ...an ambient air and heatspreader plate temperature on any spot of the heatspreader s surface according the module specifications 60 C for commercial grade modules 75 C for extended temperature grade mo...

Page 24: ...upported do not exclude OS support e g Hardware Monitor HWM is accessible via SMB If any other LPC Super I O additional BIOS implementations are necessary contact Kontron Support Serial Peripheral Int...

Page 25: ...erial RX TX port defined in the QSEVEN specification on pin 171 UART0_TX and pin A 177 UART0_RX for UART0 The UART controller is fully 16550A compatible UART features are On Chip bit rate baud rate ge...

Page 26: ...4 V 3 3 V Trusted Platform Module TPM 2 0 5 8 A Trusted Platform Module TPM stores RSA encryption keys specific to the host system for hardware authentication The term TPM refers to the set of specif...

Page 27: ...y powered or running in idle mode the processor drops to lower frequencies by changing the CPU ratios and voltage thus conserving battery life while maintaining a high level of performance The frequen...

Page 28: ...ddress 8 bit I2C Address Used For Available Comment A0h JIDA EEPROM Yes Module EEPROM C0h LVDS PTN3460 Yes LVDS EEPROM System Management SM Bus 6 3 The 8 bit SMBus address uses the LSB Bit 0 for the d...

Page 29: ...is chapter gives the definitions and shows the positions of headers and connectors 7 1 1 Connectors Table 9 Connectors of Qseven Q7AL Connector Function Remark FCI Option MIPI CSI2 Connector 1x36 pin...

Page 30: ...Bi directional tristate IO pin IS Schmitt trigger input TTL compatible IOC Input open collector Output TTL compatible IOD Input Output CMOS level Schmitt triggered Open drain output NC Not Connected O...

Page 31: ...W High SKU 40 C to 85 C Commercial Grade Intel Mobile Celeron N3350 2C 2 3 GHz 6 W Entry SKU 0 C to 60 C Intel Mobile Celeron N4200 2C 2 5 GHz 6 W High SKU 0 C to 60 C Table 11 Processor Support Name...

Page 32: ...escription 8 GByte LPDDR3L MIPI CSI2 Connector 8 3 Figure 11 MIPI CSI2 Connector Table 13 MIPI CSI2 Connector Pin Signal Pin Signal 1 CAM_PWR 3 3V 19 CAM0_I2C_DAT 2 CAM_PWR 3 3V 20 CAM0_ENA 3 CAM0_CSI...

Page 33: ...or is MXM 230 pins connector it has same pins on both sides Top side 103 pins are on the left side 12 pins on the right side Bottom side mirrored 12 pins are on the left side 103 pins on the right sid...

Page 34: ..._DAT1 49 SDIO_DAT0 50 SDIO_DAT3 51 SDIO_DAT2 52 reserved 53 reserved 54 reserved 55 reserved 56 USB_OTG_PEN 57 GND 58 GND 59 HDA_SYNC I2S_WS 60 SMB_CLK GP1_I2C_CLK 61 HDA_RST I2S_RST 62 SMB_DAT GP1_I2...

Page 35: ...I2C_DAT LVDS_DID_DAT 126 eDP0_HPD LVDS_BLC_DAT 127 GP2_I2C_CLK LVDS_DID_CLK 128 eDP1_HPD LVDS_BLC_CLK 129 CAN0_TX 130 CAN0_RX 131 DP_LANE3 TMDS_CLK 132 USB_SSTX1 133 DP_LANE3 TMDS_CLK 134 USB_SSTX1 13...

Page 36: ...191 SERIRQ GPIO6 192 LPC_LDRQ GPIO7 193 VCC_RTC 194 SPKR GP_PWM_OUT2 195 FAN_TACHOIN GP_TIMER_IN 196 FAN_PWMOUT GP_PWM_OUT1 197 GND 198 GND 199 SPI_MOSI 200 SPI_CS0 201 SPI_MISO 202 SPI_CS1 203 SPI_SC...

Page 37: ...r on the board 2 Wait until the first characters appear on the screen POST messages or splash screen 3 Press the DEL key 4 If the uEFI BIOS is password protected a request for password will appear Ent...

Page 38: ...frames The left frame displays all available functions Configurable functions are displayed in blue Functions displayed in grey provide information about the status or the operational configuration T...

Page 39: ...tivate the Ethernet chip set the following Advanced Network Stack Configuration Network Stack Enable 88 88 88 88 87 88 is a special pattern that will be filled in by the Ethernet firmware if there is...

Page 40: ...n is included Table 18 Advanced Setup menu Sub screens and Functions Sub Screen Function Second level Sub Screen Description Driver Health Read only Information Provides Health Status for the Drivers...

Page 41: ...0 TPM 1 2 restricts support to TPM 1 2 devices TPM 2 0 restricts support to TPM 2 0 devices TPM 1 2 TPM 2 0 Auto ACPI Settings Enable ACPI Auto Configuration Enables or disables BIOS ACPI auto configu...

Page 42: ...el VME Virtual Technology Enables VMM to utilize additional hardware capabilities provided by Vanderpool Technology Enabled Disabled VT d CPU VT d Enabled Disabled Monitor Mwait Monitor Mwait Enabled...

Page 43: ...Power up Delay Displays maximum time taken for the device to report itself to the host properly Auto uses the default root port 100 ms hub port delay is taken from hub port descriptor Auto Manual Mass...

Page 44: ...tch to select which controller own the I2C_PM_CK I2C_PM_DAT pins on Qseven connector Use I2C0 Controller Use SMBUS Controller Lid Switch Mode Shows or hides Lid switch inside ACPI OS Enabled Disabled...

Page 45: ...t for a kernel debugger Enable Disable APEI BERT Enable or disable APEI BERT Enable Disable ACPI Memory Debug Enable or disable ACPI Memory Debug Enable Disable End Of Post TXE Debug Disable to stop B...

Page 46: ...Second level Sub Screen Description RC ACPI Setting continued Native ASPM On enable windows will control the ASPM support for the device If disabled the BIOS will Enable Disable RTD3 Settings RTD3 Sup...

Page 47: ...ttings are in bold Table 19 Chipset Set North Bridge Sub screens and Function Function Second level Sub Screen Description Memory Configuration Max TOLUD Sets the maximum TOLUD value Dynamic assignmen...

Page 48: ...dge Sub screens and Functions Function Second level Sub Screen Description Serial IRQ Mode Configure Serial IRQ Mode Quiet Continuous SMBus Support Enable or disable SMBus Support Enabled Disabled OS...

Page 49: ...The following table shows the Uncore Configuration sub screens and functions and describes the content Default settings are in bold Table 21 Chipset Set Uncore Configuration Sub screens and Functions...

Page 50: ...s DVMT 5 0 pre allocated fixed graphics memory size used by Internal graphics 64 M 96 M 128 M 160 M 192 M 224 M 256 M 288 M 320 M 352 M 384 M 416 M 448 M 480M 512 M DVMT Total Gfx Mem Selects DVMT 5 0...

Page 51: ...QSEVEN Q7AL Rev 1 0 www kontron com 51 Function Second level Sub Screen Description IPU Enable Disable IPU Device Enable Disable...

Page 52: ...ub Screen Description HD Audio Configuration HD Audio Support HD Audio support Enable Disable HD Audio DSP HD Audio DSP Enable Disable Audio DSP Feature Support Audio DSP Compliance Mode Sets DSP enab...

Page 53: ...BT Intel HFP BIT6 BT Intel A2DP BIT9 Context Aware Enabled Disabled BT Intel HFP DSP Feature Bitmask structure BIT0 WoV BIT1 BT Sideband BIT2 Codec based VAD BIT3 SRAM Reclaim BIT5 BT Intel HFP BIT6...

Page 54: ...IT2 Codec based VAD BIT3 SRAM Reclaim BIT5 BT Intel HFP BIT6 BT Intel A2DP BIT9 Context Aware Enabled Disabled DSP based Speech Pre Processing DSP Feature Bitmask structure BIT0 WoV BIT1 BT Sideband B...

Page 55: ...HD Audio link owns all the I O buffers I2S port owns all the I O buffers HD Audio Clock Gating HD Audio Clock gating Enabled Disabled HD Audio Power Gating HD Audio Power gating Enabled Disabled HD Au...

Page 56: ...t Port 3 QSEVEN PCIe 3 PCI Express Root Port Controls the PCI Express port Auto automatically disables the unused root port for optimum power saving Auto Enabled Disabled ASPM Active State Power Manag...

Page 57: ...ange 1 MB 20 MB Reserved I O Reserved I O for this root bridge Range 4 k 8 k 12 k 16 k 20 k PCH PCIE LTR PCH PCIE latency reporting Enabled Disabled Snoop Latency Override Snoop latency override or No...

Page 58: ...directly as soon as power is applied S5 state system remains in power off states until the power button is pressed S0 State S5 State Power Button Debounce Mode Enable interrupt when PWRBTN is asserted...

Page 59: ...59 9 2 4 Security Setup Menu The Security Setup menu provides information about the passwords and functions for specifying the security settings such as Hard Disk user and master passwords Figure 19...

Page 60: ...sable to power cycle the system after setting Hard Disk passwords The Discarding or Saving Changes in the setup does not have an impact on HDD when the password is set or removed If the setup HDD user...

Page 61: ...ly access to setup is limited The password is only entered when entering the setup If only the user s password is set then the password is a power on password and must be entered to boot or enter setu...

Page 62: ...keyboard NumLock state ON OFF Quiet Boot Quiet Boot Enabled Disabled Boot Option Sets the system boot order Fast Boot Enables or disables FastBoot features Note Most probes are skipped to reduce time...

Page 63: ...S2 Support Enabled Disabled Netwrok Stack Driver Support Netwrok Stack Driver Support Enabled Disabled Redirection Support Redirection Support Enabled Disabled New Boot Option Policy Controls the plac...

Page 64: ...system after saving changes Discard Changes and Reset Resets system setup without saving changes Save Changes Saves changes made so far for any setup options Discard Changes Discards changes made so f...

Page 65: ...ell forms an entry into the uEFI boot order and is the first boot option by default 9 3 1 1 Entering the uEFI Shell To enter the uEFI Shell follow the steps below 1 Power on the board 2 Press the F7 k...

Page 66: ...ached to the system To copy the startup script to the flash use the kBootScript uEFI Shell command In case there is no mass storage device attached the startup script can be generated in a RAM disk an...

Page 67: ...l cd your_directory 6 Start flash nsh if available OR enter fpt F Q7ALi xxx bin 7 Wait until flashing is successful and then power cycle the board Do not switch off the power during the flash process...

Page 68: ...cuit Communications IOT Internet of Things ISA Industry Standard Architecture LAN Local Area Network LPC Low Pin Count Interface LPT Line Printing Terminal LSB Least Significant Bit LVDS Low Voltage D...

Page 69: ...nd tailor made solutions based on highly reliable state of the art embedded technologies Kontron provides secure and innovative applications for a variety of industries As a result customers benefit f...

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