QSEVEN-Q7AL - Rev.1.0
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Function
Second level Sub-Screen / Description
LPSS
Configuration>
(continued)
Support (D24:F2)>
[Enable, Disable]
LPSS SPI0 Support
(D25:F0)>
LPSS SPI0 Support
[Enable, Disable]
LPSS IOSF PMCTL
S0ix Enable>
LPSS IOSF Bridge PMCTL Register S0ix Bits
[Enable, Disable]
PCI Express
Configuration>
PCI Express Clock
Gating>
PCI Express clock gating for each root port
[Enabled, Disabled]
Port8xh Decode>
PCI express port 8xh decode
[Enabled, Disabled]
Peer Memory Write
Enable>
Peer memory write
[Enabled, Disabled]
Compliance Test
Mode>
Enable when using compliance load board
[Enabled, Disabled]
PCI Root Port 4
(GbE)>
or
PCI Root Port 5
(NC)
or
PCI Root Port 0
(QSEVEN PCIe#0)>
or
PCI Root Port 1
(QSEVEN PCIe#1)>
or
PCI Root Port 2
(QSEVEN PCIe#2)>
or
PCI Root Port 3
(QSEVEN PCIe#3)>
PCI Express Root
Port[#]>
Controls the PCI Express port
Auto automatically disables the unused root
port for optimum power saving.
[Auto,Enabled, Disabled]
ASPM>
Active State Power Management (ASPM)
level settings
[Disabled, Auto, L0s, L1, L0sL1]
L1 Substates>
PCI Express L1 substrates settings
[Disabled, L1.1, L1.2, L1.1 & L1.2]
ACS>
Access Control Service Extended Capability
[Enabled, Disabled]
URR>
PCI Express unsupported request reporting
[Enabled, Disabled]
FER>
PCI Express device fatal error reporting
[Enabled, Disabled]
NFER>
PCI Express device non-fatal error reporting
[Enabled, Disabled]
CER>
PCI Express device correctable error
reporting
[Enabled, Disabled]
CTO>
PCI Express completion timer (T0)
[Default Setting, 16-55 ms, 65-210 ms,
260-900 ms, 1-3.5 s, Disabled]
SEFE>
Root PCI Express System Error on Fatal Error
[Enabled, Disabled]
SENFE>
Root PCI Express System Error on non-Fatal
Error
[Enabled, Disabled]
SECE>
Root PCI Express System Error on
correctable error