Keysight U3606A, Programmer'S Reference Manual, Page: 345 / 372

IEEE-488.2 Common Commands 15
*SRE
U3606A Programmer’s Reference 331
Parameter
Remarks
• An enable register defines which bits in the event register is reported
to the Status Byte register group. You can write to or read from an
enable register.
• The *CLS (clear status) command will not clear the enable register but
it does clear all bits in the event register.
• The
*PSC
(power- on status clear) command determines whether or not
the Status Byte enable register is cleared at power on, or not cleared.
• A STATus:PRESet , SYSTem:PRESet , *CLS , or *RST command does
not clear the bits in the Status Byte enable register.
• Refer to Figure 1- 1 on page 13 for the status system diagram.
Example
See also
“STATus:PRESet” on page 288
“SYSTem:PRESet” on page 301
“*PSC” on page 326
“*STB?” on page 332
Item Type Range of values Default value
value Numeric 0 to 255
[1]
[1]
Refer to Table 15-2 for the list of bit definitions for the Status Byte register. To enable more than one
bit at a time, use the binary-weighted sum of the intended bits. For example, to set bit 2, 4, and 5,
use
52
(4 + 16 + 32) as your value.
0
&
*SRE 16
This command enables bit 4 (decimal value =
16) in the enable register.
&
*SRE?
This query returns which bits are enabled in the
register.
$
16