Platform Management
Intel® Server Boards SE7320SP2 and SE7525GP2
Revision
4.0
102
5.2.1 mBMC
Self-test
The mBMC performs various tests as part of its initialization. If a failure is determined, the
mBMC stores the error internally. A failure may be caused by a corrupt mBMC FRU, SDR, or
SEL. The IPMI 1.5
Get Self Test Results
command can be used to return the first error
detected.
Executing the
Get Self Test Results
command causes the mBMC self-test to be run. It is
strongly recommended to reset the mBMC via a server power cycle afterwards.
5.2.2 SMBus
Interfaces
The mBMC incorporates one slave and two master-only SMBus interfaces. The mBMC
interfaces with the host through the slave SMBus interface. It interfaces with the LAN On
Motherboard (LOM) and peripherals through the two independent master bus interfaces.
5.2.3
External Interface to mBMC
Figure 15 shows the data/control flow to and within the functional modules of the mBMC.
External interfaces from the host system, LOM, and peripherals, interact with the mBMC
through the corresponding interface modules as shown.
The mBMC communicates with the internal modules using its private SMBus. External devices
and sensors interact with the mBMC using the peripheral SMBus. LOM communicates through
the LOM SMBus. GPIO pins are available and are used for various input and output functions.
Dedicated LED lines are used for LED/color control.
Built into the mBMC are the control functions for both the power supply and front panel.
Figure 15. External Interfaces to mBMC
P C I
S M B u s
S M B u s
S e n s o r
D e v ic e s
F ro n t P a n e l
Summary of Contents for SE7320SP2 - 800MHZ Ecc Ddr Xeon
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