Intel® Server Boards SE7320SP2 and SE7525GP2
Error Reporting and Handling
Revision 4.0
137
Diagnostic LED Decoder
G=Green, R=Red, A=Amber
Checkpoint
MSB
LSB
Description
A7
R
G
A
G
Displays the system configuration screen if enabled. Initialize the
CPU’s before boot, which includes the programming of the MTRR’s.
A8
A
OFF
R
OFF
Prepare CPU for operating system boot including final MTRR values.
A9
A
OFF
R
G
Wait for user input at config display if needed.
AA
A
OFF
A
OFF
Uninstall POST INT1Ch vector and INT09h vector. Deinitializes the
ADM module.
AB
A
OFF
A
G
Prepare BBS for Int 19 boot.
AC
A
G
R
OFF
End of POST initialization of chipset registers.
B1
R
OFF
R
A
Save system context for ACPI.
00
OFF OFF OFF OFF Passes
control
to OS Loader (typically INT19h).
6.3.4
Bootblock Initialization Code Checkpoints
The bootblock initialization code sets up the chipset, memory and other components before
system memory is available. The following table describes the type of checkpoints that may
occur during the bootblock initialization portion of the BIOS:
Table 66. Bootblock Initialization Code Checkpoints
Diagnostic LED Decoder
G=Green, R=Red, A=Amber
Checkpoint
MSB
LSB
Description
Before D1
Early chipset initialization is done. Early super I/O initialization is
done including RTC and keyboard controller. NMI is disabled.
D1
R
R
OFF
A
Perform keyboard controller BAT test. Check if waking up from
power management suspend state. Save power-on CPUID value in
scratch CMOS.
D0
R
R
OFF
R
Go to flat mode with 4 GB limit and GA20 enabled. Verify the
bootblock checksum.
D2
R
R
G
R
Disable CACHE before memory detection. Execute full memory
sizing module. Verify that flat mode is enabled.
D3
R
R
G
A
If memory sizing module not executed, start memory refresh and do
memory sizing in Bootblock code. Do additional chipset initialization.
Re-enable CACHE. Verify that flat mode is enabled.
D4
R
A
OFF
R
Test base 512 KB memory. Adjust policies and cache first 8 MB. Set
stack.
D5
R
A
OFF
A
Bootblock code is copied from ROM to lower system memory and
control is given to it. BIOS now executes out of RAM.
D6
R
A
G
R
Both key sequence and OEM specific method is checked to
determine if BIOS recovery is forced. Main BIOS checksum is tested.
If BIOS recovery is necessary, control flows to checkpoint E0. See
Bootblock Recovery Code Checkpoints section of document for more
information.
D7
R
A
G
A
Restore CPUID value back into register. The Bootblock-Runtime
interface module is moved to system memory and control is given to
it. Determine whether to execute serial flash.
Summary of Contents for SE7320SP2 - 800MHZ Ecc Ddr Xeon
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