
3.2.1. AS Configuration Scheme Hardware Components and File Types ...........................................................................88
3.2.2. AS Single-Device Configuration.........................................................................................................................90
3.2.3. AS Using Multiple Serial Flash Devices............................................................................................................... 91
3.2.4. AS Configuration Timing Parameters..................................................................................................................93
3.2.5. Maximum Allowable External AS_DATA Pin Skew Delay Guidelines......................................................................... 94
3.2.6. Programming Serial Flash Devices.....................................................................................................................95
3.2.7. Serial Flash Memory Layout..............................................................................................................................99
3.2.8. AS_CLK....................................................................................................................................................... 100
3.2.9. Active Serial Configuration Software Settings ................................................................................................... 101
3.2.10. Intel Quartus Prime Programming Steps......................................................................................................... 102
3.2.11. Debugging Guidelines for the AS Configuration Scheme.................................................................................... 106
3.2.12. QSF Assignments for AS...............................................................................................................................108
3.4.1. JTAG Configuration Scheme Hardware Components and File Types....................................................................... 114
3.4.2. JTAG Device Configuration..............................................................................................................................115
3.4.3. JTAG Multi-Device Configuration......................................................................................................................118
3.4.4. Debugging Guidelines for the JTAG Configuration Scheme...................................................................................119
4.1.1. RSU Glossary................................................................................................................................................123
4.1.2. Remote System Update Using AS Configuration.................................................................................................124
4.1.3. Remote System Update Configuration Images .................................................................................................. 125
4.1.4. Remote System Update Configuration Sequence................................................................................................126
4.1.5. RSU Recovery from Corrupted Images............................................................................................................. 127
4.1.6. Updates with the Factory Update Image........................................................................................................... 130
4.2. Guidelines for Performing Remote System Update Functions for Non-HPS......................................................................... 131
4.3. Commands and Responses......................................................................................................................................... 132
4.3.1. Operation Commands.................................................................................................................................... 134
4.3.2. Error Code Responses....................................................................................................................................140
4.4.1. High Level Flash Layout................................................................................................................................. 141
4.4.2. Detailed Quad SPI Flash Layout.......................................................................................................................146
Contents
Intel
®
Agilex
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Configuration User Guide
3