Intel Agilex, Configuration User Manual, Page: 188 / 196

The following topics describe the expected behavior of configuration pins. In addition, these topics provide some suggestions
to assist in debugging configuration failures. Refer to the separate sections on each configuration scheme for debugging
suggestions that pertain to a specific configuration scheme.
Related Information
• Debugging Guidelines for the Avalon-ST Configuration Scheme on page 52
• Debugging Guidelines for the AS Configuration Scheme on page 106
• Debugging Guidelines for the JTAG Configuration Scheme on page 119
6.7.1. nCONFIG
The
nCONFIG
pin is a dedicated, input pin of the SDM.
nCONFIG
has two functions:
• Hold-off initial configuration
• Initiate FPGA reconfiguration
The
nCONFIG
pin transition from low to high signals a configuration or reconfiguration request. The
nSTATUS
pin indicates
device readiness to initiate FPGA configuration.
The configuration source can only change the state of the
nCONFIG
pin when it has the same value as
nSTATUS
. When the
Intel Agilex device is ready it drives
nSTATUS
to follow
nCONFIG
.
The host should drive
nCONFIG
low to initiate device cleaning. Then the host should deassert
nCONFIG
initiate configuration.
If the host drives
nCONFIG
low during a configuration cycle, that configuration cycle stops. The SDM expects a new
configuration cycle to begin.
Debugging Suggestions
The host drives
nCONFIG
. Be sure that it is not floating or stuck low.
nCONFIG
should remain high during configuration.
6.7.2. nSTATUS
nSTATUS
has the following two functions:
•
To behave as an acknowledge for
nCONFIG
.
•
To behave as an error status signal. It is important to monitor
nSTATUS
to identify configuration failures.
6. Intel Agilex Debugging Guide
UG-20205 | 2019.10.09
Intel
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Agilex
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Configuration User Guide
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