Intel Agilex, Configuration User Manual, Page: 138 / 196

Command Code
(Hex)
Command
Length
(9)
Response
Length
(9)
Description
When successful returns OK followed by the read data from the quad SPI device. A failure
response returns an error code.
For a partially successful read,
QSPI_READ
may erroneously return the
OK
status.
Note: You cannot run the
QSPI_READ
command while device configuration is in progress.
QSPI_WRITE
39 2+N 0 Writes data to the quad SPI device. Takes three arguments:
• The flash address offset (one word). The write address must be word aligned. The device
returns error code
0x3FF
for non-aligned addresses.
• The number of words to write (one word).
• The data to be written (one or more words).
A successful write returns the OK response code.
To prepare memory for writes, Intel recommends using the
QSPI_ERASE
command before issuing
this command.
Note: You cannot run the
QSPI_WRITE
command while device configuration is in progress.
QSPI_ERASE
38 2 0 Erases a sector of the quad SPI device. Takes two arguments:
• The flash address offset to start the erase (one word). The address must be the start address
of a sector within the flash memory; consequently, the address must be 64 KB aligned.
Returns an error for non-64 KB aligned addresses.
• The number of words to erase specified in multiples of 0x4000 words.
A successful erase returns the OK response code.
QSPI_READ_DEVICE_
REG
35 2 N Reads registers from the quad SPI device. The maximum read is 8 bytes. Takes two arguments.
• The opcode for the read command.
• The number of bytes to read.
A successful read returns the OK response code followed by the data read from the device. Pads
data that is not a multiple of 4 bytes to the next word boundary.
QSPI_WRITE_DEVICE
_REG
36 2+N 0 Writes to registers of the quad SPI. The maximum write is 8 bytes. Takes three arguments:
• The opcode for the write command.
• The number of bytes to write.
• The data to write.
To perform a sector erase or sub-sector erase, you must specify the serial flash address in most
significant byte (MSB) to least significant byte (LSB) order as the following example illustrates.
continued...
(9)
This number does not include the command and response header.
4. Remote System Update (RSU)
UG-20205 | 2019.10.09
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Agilex
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