Intel Agilex, Configuration User Manual, Page: 160 / 196

• You should create and download this example to the Intel Agilex SoC Development Kit.
• Your design should include the Mailbox Client Intel FPGA IP that connects to a JTAG to Avalon Master Bridge as shown the
Platform Designer system. The JTAG to Avalon Master Bridge acts as the remote system update host controller for your
factory and application images.
Figure 67. Required Communication and Host Components for the Remote System Update Design Example
4. Remote System Update (RSU)
UG-20205 | 2019.10.09
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