Intel Agilex, Configuration User Manual, Page: 134 / 196

Header Bit Description
Length
[22:12] Number of words of arguments following the header. The IP responds with an error if a wrong number of
words of arguments is entered for a given command.
Reserved [11] Reserved. Must be set to 0.
Command Code/Error Code
[10:0]
Command Code
specifies the command. The
Error Code
indicates whether the command succeeded or
failed.
In the command header, these bits represent command code. In the response header, these bits
represent error code.
4.3.1. Operation Commands
Table 35. Command List and Description
Command Code
(Hex)
Command
Length
(9)
Response
Length
(9)
Description
RSU_IMAGE_UPDATE
5C 2 0 Triggers reconfiguration from the data source which can be either the factory or an application
image.
This command takes an optional 64-bit argument that specifies the reconfiguration data address
in the flash. If you do not provide this argument its value is assumed to be 0.
• Bit [63:32]: Reserved (write as 0).
• Bit [31:0]: The start address of an application image.
Returns a non-zero response if the device is already processing a configuration command.
RSU_GET_SPT
5A 0 4
RSU_GET_SPT
retrieves the quad SPI flash location for the two sub-partition tables that the RSU
uses: SPT0 and SPT1.
The 4-word response contains the following information:
Offset Name Description
0 SPT0[63:32]
SPT0 address in quad SPI flash.
1 SPT0[31:0]
2 SPT1[63:32]
SPT0 address in quad SPI flash.
3 SPT1[31:0]
continued...
(9)
This number does not include the command and response header.
4. Remote System Update (RSU)
UG-20205 | 2019.10.09
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